公开(公告)号：US20250071924A1

公开(公告)日：2025-02-27

申请号：US18940819

申请日：2024-11-07

Applicant: Intel Corporation

Inventor： Phil Geng ,  David Shia ,  Xiang Li ,  George Vergis ,  Ralph Miele ,  Sanjoy Saha ,  Jeffory Smalley

IPC: H05K7/14

Abstract: Methods and apparatus relating to tall Dual Inline Memory Module (DIMM) structural retention are described. In one embodiment, a Dual In-Line Memory Module (DIMM) retention frame is coupled to a top portion of a tall (e.g., “two unit” or taller) DIMM. A plurality of fasteners physically attach the DIMM retention frame to a Printed Circuit Board (PCB). The DIMM retention frame reduces movement of the tall DIMM. Other embodiments are also claimed and disclosed.

公开(公告)号：US20230031457A1

公开(公告)日：2023-02-02

申请号：US17957436

申请日：2022-09-30

Applicant: Intel Corporation

Inventor： Phil Geng ,  Ralph Miele ,  Christopher Gonzalez ,  Timothy Gates ,  Sanjoy Saha ,  Ashish Gupta ,  Sandeep Ahuja

IPC: B21C37/16

Abstract: Methods, systems, apparatus, and articles of manufacture to crimp a tube are disclosed. An example crimp disclosed herein includes a first crimp section extending between a first end of the crimp and a point along the crimp between the first end and a second end, a first inner diameter of the first crimp section constant between the first end and the point, and a second crimp section adjacent the first crimp section, the second crimp section extending between the point and the second end, a second inner diameter of the second crimp section to increase from the point to the second end.

公开(公告)号：US20250089192A1

公开(公告)日：2025-03-13

申请号：US18961017

申请日：2024-11-26

Applicant: Intel Corporation

Inventor： Phil Geng ,  Dongwang Chen ,  Fernando Gonzalez Lenero ,  Chuansheng Liu ,  Lejie Liu ,  Ralph V. Miele ,  Mohanraj Prabhugoud ,  Sanjoy Saha ,  David Shia ,  Jeffory L. Smalley ,  Ke Song ,  Meng Wang ,  Xiaoning Ye ,  Juan Zermeno Carriedo ,  Yipeng Zhong

IPC: H05K5/02 ,  H05K5/04

Abstract: Composite backplate architectures for backside power delivery and associated methods are disclosed. An example backplate includes a first layer including a first material, and a second layer attached to the first layer. The second layer includes a second material different from the first material. The example backplate further includes a bus bar attached to the first layer.

公开(公告)号：US20240355759A1

公开(公告)日：2024-10-24

申请号：US18136775

申请日：2023-04-19

Applicant: Intel Corporation

Inventor： Phil Geng ,  Baris Bicen ,  Kai Xiao ,  Sanjoy Saha ,  Prasanna Raghavan

IPC: H01L23/00

CPC classification number: H01L23/562 ,  H01L23/3675 ,  H01L23/4006 ,  H01L2023/4081 ,  H01L2023/4087 ,  H01L23/427 ,  H01L24/32 ,  H01L24/71 ,  H01L2224/32245 ,  H01L2224/71

Abstract: Damping structures in integrated circuit (IC) devices, and techniques for forming the structures are discussed. An IC device includes, between an IC package and a socket, both a spring force and a damping structure adjacent an array of pins and corresponding lands. The damping structure may be of a dissipative, viscous, or viscoelastic material. The damping structure may be between the IC package and socket. The damping structure may be within a periphery of the socket. The damping structure may be coupled to the IC package or the socket by an adhesive or a press fit. A heatsink or a heat spreader may be coupled to the IC package over the socket.