公开(公告)号：US11652061B2

公开(公告)日：2023-05-16

申请号：US16442801

申请日：2019-06-17

Applicant: Intel Corporation

Inventor： Shenavia S. Howell ,  John J. Beatty ,  Raymond A. Krick ,  Suzana Prstic

IPC: H01L23/538 ,  H01L23/488 ,  H01L21/78 ,  H01L23/532

CPC classification number: H01L23/5386 ,  H01L21/7806 ,  H01L23/488 ,  H01L23/53242 ,  H01L23/53257

Abstract: Embodiments may relate to a microelectronic package that includes a die and a backside metallization (BSM) layer positioned on the face of the die. The BSM layer may include a feature that indicates that the BSM layer was formed on the face of the die by a masked deposition technique. Other embodiments may be described or claimed.

公开(公告)号：US11798861B2

公开(公告)日：2023-10-24

申请号：US16504698

申请日：2019-07-08

Applicant: Intel Corporation

Inventor： Peng Li ,  Kelly P. Lofgreen ,  Manish Dubey ,  Bamidele Daniel Falola ,  Ken Hackenberg ,  Shenavia S. Howell ,  Sergio Antonio Chan Arguedas ,  Yongmei Liu ,  Deepak Goyal

IPC: H01L23/34 ,  H01L21/48 ,  H01L23/433 ,  H01L23/367

CPC classification number: H01L23/345 ,  H01L21/4871 ,  H01L23/367 ,  H01L23/433

Abstract: Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.

公开(公告)号：US20200381334A1

公开(公告)日：2020-12-03

申请号：US16423664

申请日：2019-05-28

Applicant: Intel Corporation

Inventor： Karthik Visvanathan ,  Shenavia S. Howell ,  Sergio Antonio Chan Arguedas ,  Peng Li

IPC: H01L23/42 ,  H01L23/373 ,  H05K1/18 ,  H01L25/065 ,  H01L23/522

Abstract: Disclosed herein are integrated circuit (IC) packages with asymmetric adhesion material regions, as well as related methods and devices. For example, in some embodiments, an IC package may include a solder thermal interface material (STIM) between a die of the IC package and a lid of the IC package. The lid of the IC package may include an adhesion material region, in contact with the STIM, that is asymmetric with respect to the die.

公开(公告)号：US11682605B2

公开(公告)日：2023-06-20

申请号：US16423664

申请日：2019-05-28

Applicant: Intel Corporation

Inventor： Karthik Visvanathan ,  Shenavia S. Howell ,  Sergio Antonio Chan Arguedas ,  Peng Li

IPC: H01L23/42 ,  H01L23/373 ,  H05K1/18 ,  H01L25/065 ,  H01L23/522 ,  H01L23/00

CPC classification number: H01L23/42 ,  H01L23/3736 ,  H01L23/5226 ,  H01L25/0655 ,  H05K1/18 ,  H01L24/09 ,  H01L24/17 ,  H05K2201/10734

Abstract: Disclosed herein are integrated circuit (IC) packages with asymmetric adhesion material regions, as well as related methods and devices. For example, in some embodiments, an IC package may include a solder thermal interface material (STIM) between a die of the IC package and a lid of the IC package. The lid of the IC package may include an adhesion material region, in contact with the STIM, that is asymmetric with respect to the die.

公开(公告)号：US20210013117A1

公开(公告)日：2021-01-14

申请号：US16504698

申请日：2019-07-08

Applicant: Intel Corporation

Inventor： Peng Li ,  Kelly P. Lofgreen ,  Manish Dubey ,  Bamidele Daniel Falola ,  Ken Hackenberg ,  Shenavia S. Howell ,  Sergio Antonio Chan Arguedas ,  Yongmei Liu ,  Deepak Goyal

IPC: H01L23/34 ,  H01L23/367 ,  H01L23/433 ,  H01L21/48

Abstract: Embodiments may relate to a microelectronic package that includes a lid coupled with a package substrate such that a die is positioned between the lid and the package substrate. The lid may include a heating element that is to heat an area between the lid and the die. Other embodiments may be described or claimed.