公开(公告)号：US20210066882A1

公开(公告)日：2021-03-04

申请号：US16554789

申请日：2019-08-29

Applicant: INTEL CORPORATION

Inventor： Priyanka Dobriyal ,  Susheel G. Jadhav ,  Ankur Agrawal ,  Quan A. Tran ,  Raiyomand F. Aspandiar ,  Kenneth M. Brown

IPC: H01S5/022 ,  G02F1/015

Abstract: An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.

公开(公告)号：US11715928B2

公开(公告)日：2023-08-01

申请号：US16554789

申请日：2019-08-29

Applicant: INTEL CORPORATION

Inventor： Priyanka Dobriyal ,  Susheel G. Jadhav ,  Ankur Agrawal ,  Quan A. Tran ,  Raiyomand F. Aspandiar ,  Kenneth M. Brown

IPC: H01S5/0234 ,  G02F1/015 ,  H01S5/0237 ,  H01S5/02234 ,  H01S5/02325 ,  H01S5/026

CPC classification number: H01S5/0234 ,  G02F1/015 ,  H01S5/0237 ,  H01S5/02234 ,  H01S5/02325 ,  H01S5/0261

Abstract: An integrated circuit assembly includes a support (e.g., package substrate or circuit board) and a semiconductor die including a device. The semiconductor die is mounted to the support with the device facing the support. The device can be, for example, a quantum well laser device or a photonics device. A layer of decoupling material is on the device. An underfill material is between the semiconductor die and the support, where the decoupling material is between the device and the underfill material. The decoupling layer decouples stress from transferring from the underfill material into the device. For example, the decoupling material forms only weak bonds with the underfill material and/or a passivation layer on the device, in an embodiment. Weak bonds include non-covalent bonds and non-ionic bonds, for example. The decoupling material can be, for instance, a PTFE film, a poly(p-xylylene) film, a fluorocarbon, or a compound lacking free hydroxyl groups.

公开(公告)号：US20160260679A1

公开(公告)日：2016-09-08

申请号：US14430131

申请日：2014-03-27

Applicant: Intel Corporation

Inventor： Kabirkumar J. Mirpuri ,  Hongjin Jiang ,  Tyler N. Osborn ,  Rajen S. Sidhu ,  Ibrahim Bekar ,  Susheel G. Jadhav

IPC: H01L23/00

CPC classification number: H01L24/73 ,  H01L21/4867 ,  H01L23/49816 ,  H01L24/05 ,  H01L24/13 ,  H01L24/29 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/0569 ,  H01L2224/11 ,  H01L2224/13014 ,  H01L2224/13026 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/29026 ,  H01L2224/29109 ,  H01L2224/29113 ,  H01L2224/73104 ,  H01L2224/92143 ,  H01L2924/014

Abstract: Apparatuses, processes, and systems related to an interconnect with an increased z-height and decreased reflow temperature are described herein. In embodiments, an interconnect may include a solder ball and a solder paste to couple the solder ball to a substrate. The solder ball and/or solder paste may be comprised of an alloy with a relatively low melting point and an alloy with a relatively high melting point.

Abstract translation: 这里描述了与具有增加的z高度和降低的回流温度的互连相关的装置，工艺和系统。 在实施例中，互连可以包括焊球和焊膏以将焊球耦合到衬底。 焊球和/或焊膏可以由具有较低熔点的合金和具有较高熔点的合金构成。