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公开(公告)号:US12046654B2
公开(公告)日:2024-07-23
申请号:US16912118
申请日:2020-06-25
Applicant: Intel Corporation
Inventor: Dan S. Lavric , Glenn A. Glass , Thomas T. Troeger , Suresh Vishwanath , Jitendra Kumar Jha , John F. Richards , Anand S. Murthy , Srijit Mukherjee
IPC: H01L29/45 , H01L21/28 , H01L21/285 , H01L29/08 , H01L29/161 , H01L29/49 , H01L29/66 , H01L29/78
CPC classification number: H01L29/45 , H01L21/28088 , H01L21/28518 , H01L29/0847 , H01L29/161 , H01L29/4966 , H01L29/66795 , H01L29/7851
Abstract: Approaches for fabricating an integrated circuit structure including a titanium silicide material, and the resulting structures, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate, a gate electrode over the top and adjacent to the sidewalls of a portion of the semiconductor fin. A titanium silicide material is in direct contact with each of first and second epitaxial semiconductor source or drain structures at first and second sides of the gate electrode. The titanium silicide material is conformal with and hermetically sealing a non-flat topography of each of the first and second epitaxial semiconductor source or drain structures. The titanium silicide material has a total atomic composition including 95% or greater stoichiometric TiSi2.
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公开(公告)号:US11282930B2
公开(公告)日:2022-03-22
申请号:US17085857
申请日:2020-10-30
Applicant: Intel Corporation
Inventor: Rishabh Mehandru , Pratik A. Patel , Thomas T. Troeger , Szuya S. Liao
IPC: H01L29/417 , H01L21/02 , H01L21/265 , H01L21/306 , H01L21/321 , H01L29/08 , H01L29/40 , H01L29/45 , H01L29/49 , H01L29/66
Abstract: Solid assemblies having a composite dielectric spacer and processes for fabricating the solid assemblies are provided. The composite dielectric spacer can include, in some embodiments, a first dielectric layer and a second dielectric layer having a mutual interface. The composite dielectric spacer can separate a contact member from a conductive interconnect member, thus reducing the capacitance between such members with respect to solid assemblies that include one of first dielectric layer or the second dielectric layer. The composite dielectric spacer can permit maintaining the real estate of an interface between the conductive interconnect and a trench contact member that has an interface with a carrier-doped epitaxial layer embodying or constituting a source contact region or a drain contact region of a field effect transistor. The trench contact member can form another interface with the conductive interconnect member, providing a satisfactory contact resistance therebetween.
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