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公开(公告)号:US20160380393A1
公开(公告)日:2016-12-29
申请号:US15079890
申请日:2016-03-24
Applicant: Intel Corporation
Inventor: Timothy D. Wig , Steven K. Krooswyk , Marc Wells
IPC: H01R13/66 , H01R13/6466 , H05K1/02 , H01R12/73
CPC classification number: H05K1/0251 , H01L23/66 , H05K1/0218 , H05K1/0219 , H05K1/0231 , H05K1/0233 , H05K1/0234 , H05K1/0245 , H05K1/117 , H05K2201/10015 , H05K2201/10022
Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.
Abstract translation: 一种装置,包括:第一对导体,用于承载差分信号;至少一个与第一对导体相邻的接地导体,要连接到接地平面的接地导体,以及至少一个特定的导体,用于承载边带信号。 特定导体经由谐振抑制电路连接到接地层,并且谐振抑制电路包括电阻器。
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公开(公告)号:US10996825B2
公开(公告)日:2021-05-04
申请号:US15186597
申请日:2016-06-20
Applicant: Intel Corporation
Inventor: Christian Karl , Charles Magnuson , Sergei Babokhov , Timothy D. Wig
IPC: G06F3/0483 , G06F1/16 , G06F3/01 , H04N5/247 , G06F3/147 , G06F3/14 , G09G3/20 , G09G3/32 , H04N5/232
Abstract: Systems, apparatuses and methods may provide for an electronic spine and one or more digital pages removably attached to the electronic spine, wherein the one or more digital pages include a first side with a first flexible display and a second side with a second flexible display. In one example, the system may further include a magnetic interface, wherein the digital page is removably attached to the electronic spine via the magnetic interface.
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公开(公告)号:US10811823B2
公开(公告)日:2020-10-20
申请号:US16043091
申请日:2018-07-23
Applicant: Intel Corporation
Inventor: Timothy D. Wig
IPC: H05K1/18 , H01R13/6471 , H01R12/71
Abstract: A system board is provided that includes a connector. The connector includes a pinfield. The pinfield includes a set of differential signal conductors to correspond to pins of a set of differential signaling pairs; a set of one or more auxiliary signal conductors to carry auxiliary signals; and a plurality of thru-hole ground vias adjacent to a particular one of the auxiliary signal conductors in the set of auxiliary signal conductors. A method for improving signal integrity in a computer interconnect can include carrying differential signals on a set of differential signal vias in a connector pinfield; carrying sideband signals on a set of sideband vias in the connector pinfield; and reducing via-to-via crosstalk between a particular one of the sideband vias and one of the differential signal vias through one or more thru-hole ground vias adjacent to the particular sideband via in the pinfield.
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公开(公告)号:US20200275549A1
公开(公告)日:2020-08-27
申请号:US16723784
申请日:2019-12-20
Applicant: Intel Corporation
Inventor: Timothy D. Wig , Steven K. Krooswyk , Marc Wells
Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.
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公开(公告)号:US10602607B2
公开(公告)日:2020-03-24
申请号:US15979268
申请日:2018-05-14
Applicant: Intel Corporation
Inventor: Timothy D. Wig , Steven K. Krooswyk , Marc Wells
Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.
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公开(公告)号:US10517168B2
公开(公告)日:2019-12-24
申请号:US15979268
申请日:2018-05-14
Applicant: Intel Corporation
Inventor: Timothy D. Wig , Steven K. Krooswyk , Marc Wells
Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.
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公开(公告)号:US10038281B2
公开(公告)日:2018-07-31
申请号:US14865220
申请日:2015-09-25
Applicant: Intel Corporation
Inventor: Timothy D. Wig
IPC: H05K1/18 , H01R13/6471 , H01R12/71
CPC classification number: H01R13/6471 , H01R12/718
Abstract: A circuit board is provided including a top ground plane, a bottom ground plane, and a pin field of a connector with a plurality of pins that includes a plurality of differential pin pairs, one or more ground pins, and one or more sideband pins. At least a particular one of the sideband pins is positioned within the pin field adjacent to a first pin of a first one of the differential pin pairs. One or more ground vias are provided on the circuit board positioned to correspond to the particular sideband pin.
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公开(公告)号:US20170047686A1
公开(公告)日:2017-02-16
申请号:US14865220
申请日:2015-09-25
Applicant: Intel Corporation
Inventor: Timothy D. Wig
IPC: H01R13/6471 , H05K7/14 , H01R13/6469
CPC classification number: H01R13/6471 , H01R12/718
Abstract: A circuit board is provided including a top ground plane, a bottom ground plane, and a pin field of a connector with a plurality of pins that includes a plurality of differential pin pairs, one or more ground pins, and one or more sideband pins. At least a particular one of the sideband pins is positioned within the pin field adjacent to a first pin of a first one of the differential pin pairs. One or more ground vias are provided on the circuit board positioned to correspond to the particular sideband pin.
Abstract translation: 提供一种电路板,其包括顶部接地平面,底部接地平面以及具有多个引脚的连接器的引脚区域,所述多个引脚包括多个差分引脚对,一个或多个接地引脚和一个或多个边带引脚。 所述边带引脚中的至少一个特定的一个位于与所述差分引脚对中的第一个的第一引脚相邻的引脚字段内。 一个或多个接地通孔设置在电路板上,定位成对应于特定边带引脚。
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公开(公告)号:US09560760B2
公开(公告)日:2017-01-31
申请号:US13903521
申请日:2013-05-28
Applicant: INTEL CORPORATION
Inventor: Timothy D. Wig
CPC classification number: H05K1/117 , H01R12/721 , H05K1/0216 , H05K3/366 , H05K2201/09781 , H05K2201/10303 , Y10T29/4913
Abstract: Techniques for reducing resonance in contact fingers of a connector are described herein. An example of a device in accordance with the present techniques includes an add-in-card that includes a circuit board and an edge contact finger disposed on an outer surface of the circuit board. The add-in-card also includes a resonator disposed in an internal layer of the circuit board and coupled to the edge contact finger, wherein the resonator reduces a resonance in the edge contact finger.
Abstract translation: 本文描述了用于减少连接器的接触指状物中的共振的技术。 根据本技术的装置的示例包括附加卡,其包括布置在电路板的外表面上的电路板和边缘接触指状物。 附加卡还包括设置在电路板的内层中并耦合到边缘接触指状物的谐振器,其中谐振器减小边缘接触指状物中的共振。
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公开(公告)号:US10999924B2
公开(公告)日:2021-05-04
申请号:US16723784
申请日:2019-12-20
Applicant: Intel Corporation
Inventor: Timothy D. Wig , Steven K. Krooswyk , Marc Wells
Abstract: An apparatus comprising includes a first pair of conductors to carry differential signals, at least one ground conductor neighboring the first pair of conductors, the ground conductor to be connected to a ground plane, and at least one particular conductor to carry sideband signals. The particular conductor is to be connected to a ground plane via a resonance mitigation circuit, and the resonance mitigation circuit comprises a resistor.
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