公开(公告)号：US11055349B2

公开(公告)日：2021-07-06

申请号：US16235823

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Luis Carlos Maria Remis ,  Vishakha Gupta ,  Christina R. Strong ,  Philip R. Lantz

IPC: G06F16/901 ,  G06F16/903 ,  G06K9/62 ,  G06F16/22 ,  G06F16/2455

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.

公开(公告)号：US20200250003A1

公开(公告)日：2020-08-06

申请号：US16652038

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Shao-Wen Yang ,  Yen-Kuang Chen ,  Ragaad Mohammed Irsehid Altarawneh ,  Juan Pablo Munoz Chiabrando ,  Siew Wen Chin ,  Kushal Datta ,  Subramanya R. Dulloor ,  Julio C. Zamora Esquivel ,  Omar Ulises Florez Choque ,  Vishakha Gupta ,  Scott D. Hahn ,  Rameshkumar Illikkal ,  Nilesh Kumar Jain ,  Siti Khairuni Amalina Kamarol ,  Anil S. Keshavamurthy ,  Heng Kar Lau ,  Jonathan A. Lefman ,  Yiting Liao ,  Michael G. Millsap ,  Ibrahima J. Ndiour ,  Luis Carlos Maria Remis ,  Addicam V. Sanjay ,  Usman Sarwar ,  Eve M. Schooler ,  Ned M. Smith ,  Vallabhajosyula S. Somayazulu ,  Christina R. Strong ,  Omesh Tickoo ,  Srenivas Varadarajan ,  Jesús A. Cruz Vargas ,  Hassnaa Moustafa ,  Arun Raghunath ,  Katalin Klara Bartfai-Walcott ,  Maruti Gupta Hyde ,  Deepak S. Vembar ,  Jessica McCarthy

IPC: G06F9/50 ,  G06K9/00 ,  G06N3/04 ,  G06N3/063

Abstract: In one embodiment, an apparatus comprises a processor to: identify a workload comprising a plurality of tasks; generate a workload graph based on the workload, wherein the workload graph comprises information associated with the plurality of tasks; identify a device connectivity graph, wherein the device connectivity graph comprises device connectivity information associated with a plurality of processing devices; identify a privacy policy associated with the workload; identify privacy level information associated with the plurality of processing devices; identify a privacy constraint based on the privacy policy and the privacy level information; and determine a workload schedule, wherein the workload schedule comprises a mapping of the workload onto the plurality of processing devices, and wherein the workload schedule is determined based on the privacy constraint, the workload graph, and the device connectivity graph. The apparatus further comprises a communication interface to send the workload schedule to the plurality of processing devices.

公开(公告)号：US11714853B2

公开(公告)日：2023-08-01

申请号：US17362554

申请日：2021-06-29

Applicant: Intel Corporation

Inventor： Luis Carlos Maria Remis ,  Vishakha Gupta ,  Christina R. Strong ,  Philip R. Lantz

IPC: G06F16/901 ,  G06F16/903 ,  G06F16/22 ,  G06F16/2455 ,  G06F18/21 ,  G06F18/22 ,  G06V10/96 ,  G06V40/16

CPC classification number: G06F16/901 ,  G06F16/2237 ,  G06F16/24558 ,  G06F16/903 ,  G06F18/21 ,  G06F18/22 ,  G06V10/96 ,  G06V40/172

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.

公开(公告)号：US11450123B2

公开(公告)日：2022-09-20

申请号：US17374217

申请日：2021-07-13

Applicant: Intel Corporation

Inventor： Christina R. Strong ,  Vishakha Gupta ,  Luis Carlos Maria Remis ,  Kushal Datta ,  Arun Raghunath

IPC: G06T7/11 ,  G06K9/62 ,  G06K15/02 ,  H04N19/176 ,  H04N19/12 ,  H04N19/124 ,  H04N19/513 ,  H04N19/48 ,  G06V30/194 ,  H04N19/167 ,  H04N19/172 ,  H04N19/44 ,  G06T7/20 ,  G06V30/262 ,  G06V10/96 ,  G06V20/00

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.

公开(公告)号：US11210023B2

公开(公告)日：2021-12-28

申请号：US16609170

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Cagri Tanriover ,  Vishakha Gupta ,  Meghashree Dattatri Kedalagudde ,  Hassnaa Moustafa

IPC: G06F3/06 ,  G06N20/00 ,  G06F9/46 ,  G06F13/16 ,  G06F13/42 ,  G06N5/02

Abstract: Systems, apparatus, and computer-readable media for managing data storage for vehicle-embedded computer devices (VECDs) are disclosed. Embodiments include a data hierarchy, which classifies data based on the data source, data destination, the intended use of the data or a target application, data processing requirements of the data, and/or delivery time requirements of the data. A VECD may classified obtained data according to the hierarchy and may store the data in different storage devices based on the classification of data. Other embodiments are described and/or claimed.

公开(公告)号：US11068757B2

公开(公告)日：2021-07-20

申请号：US16142468

申请日：2018-09-26

Applicant: Intel Corporation

Inventor： Christina R. Strong ,  Vishakha Gupta ,  Luis Carlos Maria Remis ,  Kushal Datta ,  Arun Raghunath

IPC: G06K9/72 ,  G06K9/00 ,  G06T7/11 ,  G06K9/62 ,  G06K9/66 ,  H04N19/176 ,  H04N19/12 ,  H04N19/124 ,  H04N19/513 ,  H04N19/48 ,  H04N19/167 ,  H04N19/172 ,  H04N19/44 ,  G06T7/20

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.

公开(公告)号：US11681754B2

公开(公告)日：2023-06-20

申请号：US17134306

申请日：2020-12-26

Applicant: Intel Corporation

Inventor： Vishakha Gupta ,  Alain Kagi ,  Philip Lantz ,  Subramanya Dulloor

IPC: G06F16/90 ,  G06F16/901 ,  G06F12/08 ,  G06F12/0871 ,  G06F12/0897

CPC classification number: G06F16/90 ,  G06F16/9024 ,  G06F12/0871 ,  G06F12/0897 ,  G06F2212/163 ,  G06F2212/214 ,  G06F2212/466

Abstract: Managing connected data, such as a graph data store, includes a computing device with persistent memory and volatile memory. The computing device stores a graph data store with a plurality of nodes and edges in persistent memory. Each of the edges defines the relationship between at least two of the nodes. The nodes and edges may contain tags and properties containing additional information. In response to a search request query, the computing device generates an iterator object stored in volatile memory with a reference to one or more nodes and/or edges in the graph data store. The split between volatile and persistent memory allocation could be used for other objects, such as allocators and transactions. Other embodiments are described and claimed.

公开(公告)号：US20230114468A1

公开(公告)日：2023-04-13

申请号：US17942304

申请日：2022-09-12

Applicant: Intel Corporation

Inventor： Christina R. Strong ,  Vishakha Gupta ,  Luis Carlos Maria Remis ,  Kushal Datta ,  Arun Raghunath

IPC: G06F18/24 ,  H04L9/06 ,  G06F21/64 ,  G06F21/53 ,  G06N5/022 ,  G06F21/45 ,  H04L9/32 ,  H04W4/70 ,  G06F21/44 ,  G06F16/538 ,  G06F16/535 ,  G06F16/54 ,  G06F21/62 ,  G06F9/50 ,  G06N3/04 ,  G06N3/063 ,  G06V10/20 ,  G06V10/40 ,  G06V10/75 ,  G06V10/44 ,  G06V20/00 ,  G06V40/20 ,  G06V40/16 ,  G06F9/48 ,  H04L67/51 ,  G06T7/11 ,  G06V10/96 ,  G06V30/262 ,  G06K15/02 ,  G06F18/21 ,  G06F18/22 ,  G06F18/211 ,  G06F18/213 ,  G06F18/2413 ,  G06N3/045 ,  G06N3/08 ,  H04L67/12 ,  H04N19/80 ,  G06F16/951 ,  H04N19/46 ,  G06T7/70

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.

公开(公告)号：US20220180651A1

公开(公告)日：2022-06-09

申请号：US17374217

申请日：2021-07-13

Applicant: Intel Corporation

Inventor： Christina R. Strong ,  Vishakha Gupta ,  Luis Carlos Maria Remis ,  Kushal Datta ,  Arun Raghunath

IPC: G06V30/262 ,  G06V10/96 ,  G06V20/00 ,  G06T7/11 ,  G06K9/62

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a plurality of images captured by a camera. The processor: accesses visual data associated with an image captured by the camera; determines a tile size parameter for partitioning the visual data into a plurality of tiles; partitions the visual data into the plurality of tiles based on the tile size parameter, wherein the plurality of tiles corresponds to a plurality of regions within the image; compresses the plurality of tiles into a plurality of compressed tiles, wherein each tile is compressed independently; generates a tile-based representation of the image, wherein the tile-based representation comprises an array of the plurality of compressed tiles; and stores the tile-based representation of the image on the storage device.

公开(公告)号：US20220164384A1

公开(公告)日：2022-05-26

申请号：US17362554

申请日：2021-06-29

Applicant: Intel Corporation

Inventor： Luis Carlos Maria Remis ,  Vishakha Gupta ,  Christina R. Strong ,  Philip R. Lantz

IPC: G06F16/901 ,  G06F16/903 ,  G06K9/62 ,  G06F16/22 ,  G06F16/2455

Abstract: In one embodiment, an apparatus comprises a storage device and a processor. The storage device stores a feature vector index, wherein the feature vector index comprises a sparse-array data structure representing a feature space for a set of labeled feature vectors, wherein the set of labeled feature vectors are assigned to a plurality of classes. The processor is to: receive a query corresponding to a target feature vector; access, via the storage device, a first portion of the feature vector index, wherein the first portion of the feature vector index comprises a subset of labeled feature vectors that correspond to a same portion of the feature space as the target feature vector; determine the corresponding class of the target feature vector based on the subset of labeled feature vectors; and provide a response to the query based on the corresponding class.