公开(公告)号：US20240118913A1

公开(公告)日：2024-04-11

申请号：US18283205

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Kaijie GUO ,  Junyuan WANG ,  Maksim LUKOSHKOV ,  Weigang LI ,  Xin ZENG

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F2009/45579 ,  G06F2009/45583 ,  G06F2009/45591

Abstract: An apparatus and method to implement shared virtual memory in a trust zone. For example, one embodiment of a processor comprises: a plurality of cores; a memory controller coupled to the plurality of cores to establish a first private memory region in a system memory using a first key associated with a first trust domain of a first guest; an input/output memory management unit (IOMMU) coupled to the memory controller, the IOMMU to receive a memory access request by an input/output (IO) device, the memory access request comprising a first address space identifier and a guest virtual address (GVA), the IOMMU to access an entry in a first translation table using at least the first address space identifier to determine that the memory access request is directed to the first private memory region which is not directly accessible to the IOMMU, the IOMMU to generate an address translation request associated with the memory access request, wherein based on the address translation request, a virtual machine monitor (VMM) running on one or more of the plurality of cores is to initiate a secure transaction sequence with trust domain manager to cause a secure entry into the first trust domain to translate the GVA to a physical address based on the address space identifier, the IOMMU to receive the physical address from the VMM and to use the physical address to perform the requested memory access on behalf of the IO device.

公开(公告)号：US20210019172A1

公开(公告)日：2021-01-21

申请号：US17042114

申请日：2018-06-28

Applicant: INTEL CORPORATION

Inventor： Baiju V. PATEL ,  Kapil SOOD ,  Weigang LI ,  Ping YU ,  Changzheng WEI ,  Junyuan WANG ,  Xin ZENG

IPC: G06F9/455 ,  G06F21/60 ,  G06F21/53 ,  G06F21/64 ,  G06F12/14

Abstract: A cryptographic data item utilized to derive a first cryptographic key employed by a first memory controller for implementing a first cryptographically protected execution environment for storing memory pages associated with a virtual machine may be received from a first host system via a first secure communication channel. The cryptographic data item may be transmitted to a second host system via a second secure communication channel for implementing a second cryptographically protected environment on the second host system. The first host system may be caused to migrate the memory pages of the virtual machine via an unsecured communication channel to the second host system for storing in the second cryptographically protected execution environment.

公开(公告)号：US20240241831A1

公开(公告)日：2024-07-18

申请号：US18622745

申请日：2024-03-29

Applicant: Intel Corporation

Inventor： Junyuan WANG ,  Haoxiang SUN ,  Xin ZENG ,  Maksim LUKOSHKOV ,  Weigang LI ,  Zijuan FAN ,  Jun XU

IPC: G06F12/0862

CPC classification number: G06F12/0862 ,  G06F2212/602

Abstract: Techniques to reduce data processing latency for a device. Circuitry at a device coupled with a host processor can facilitate execution of parallel tasks associated with processing data for a service offloaded to the device from the host processor. The parallel tasks can include prefetching information for address translations related to a shared virtual memory (SVM) space that is shared between the device and the host processor and prefetching data to be processed by device in relation to the offloaded service.

公开(公告)号：US20240296137A1

公开(公告)日：2024-09-05

申请号：US18647547

申请日：2024-04-26

Applicant: Intel Corporation

Inventor： Junyuan WANG ,  Maksim LUKOSHKOV ,  Weigang LI ,  Xin ZENG

IPC: G06F13/42

CPC classification number: G06F13/4221 ,  G06F2213/0024

Abstract: Techniques to improve device scalability using a peer-to-peer protocol over a communication link. The techniques can include use of an input/output (IO) device access instruction set architecture (ISA) command to place an IO job request through an agent device from a host processor to a device, the host processor, agent device and device coupled to a communication link switch. The IO job request can be communicated through the communication link switch.