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公开(公告)号:US12061493B2
公开(公告)日:2024-08-13
申请号:US17033571
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: You Li , David Duarte , Yongping Fan
IPC: G05F3/30
CPC classification number: G05F3/30
Abstract: A low power hybrid reverse (LPHR) bandgap reference (BGR) and digital temperature sensor (DTS) or a digital thermometer, which utilizes subthreshold metal oxide semiconductor (MOS) transistor and the PNP parasitic Bi-polar Junction Transistor (BJT) device to form a reverse BGR that serves as the base for configurable BGR or DTS operating modes. The LPHR architecture uses low-cost MOS transistors and the standard parasitic PNP device. Based on a reverse bandgap voltage, the LPHR can work as a configurable BGR. By comparing the configurable BGR with the scaled base-emitter voltage, the circuit can also perform as a DTS with a linear transfer function with single-temperature trim for high accuracy.
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公开(公告)号:US20160301415A1
公开(公告)日:2016-10-13
申请号:US15152462
申请日:2016-05-11
Applicant: Intel Corporation
Inventor: Jeffrey W. Waldrip , Yongping Fan , Jing Li
CPC classification number: H03L1/022 , H03B5/04 , H03B5/08 , H03L7/087 , H03L7/099 , H03L7/103 , H03L2207/06 , H04L7/033
Abstract: In some embodiments, provided are AFC circuits and methods for calibrating a second setting of an oscillator while a first setting is controlled by a temperature compensated control.
Abstract translation: 在一些实施例中,提供了AFC电路和用于校准振荡器的第二设置的方法,而第一设置由温度补偿控制来控制。
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公开(公告)号:US11239794B2
公开(公告)日:2022-02-01
申请号:US16898254
申请日:2020-06-10
Applicant: Intel Corporation
Inventor: Dongseok Shin , Hyung Seok Kim , Yongping Fan
Abstract: A frequency doubler (tripler, or quadrupler) employs current re-use coupled oscillator technique to enhance phase noise without increasing current consumption. Frequency doubler uses coupling between two oscillators running at different frequencies; a first oscillator is running at the target frequency and a second oscillator is running at half the frequency. The coupling between the two oscillators is via a transformer having a primary transformer coil and a secondary transformer coil. The first oscillator comprises a differential inductor, coarse/fine tuning capacitor arrays, and an n-type trans-conductor (GM). A virtual ground node of the n-type GM is coupled to one side of the primary transformer coil and the other side of the primary coil is coupled to the center tap of the secondary coil. The second oscillator comprises the secondary coil, coarse/fine tuning capacitor arrays, n-type GM, frequency tracking loop (FTL) and 2nd-harmonic LC filter network.
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公开(公告)号:US10700688B1
公开(公告)日:2020-06-30
申请号:US16221388
申请日:2018-12-14
Applicant: Intel Corporation
Inventor: Yongping Fan , Dan Zhang , Bo Xiang
Abstract: Described is a low power and low jitter phase locked loop (PLL) or delay locked loop (DLL) with digital leakage compensation. The compensation is provided by an apparatus which comprises: a circuitry to generate a pulse with a digitally controlled pulse width, wherein the pulse width is proportional to a static phase error of a PLL or a DLL; and a charge pump coupled to the circuitry, wherein the charge pump is to receive the pulse and to source or sink current to or from a node according to the pulse width.
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公开(公告)号:US09281824B2
公开(公告)日:2016-03-08
申请号:US13836951
申请日:2013-03-15
Applicant: Intel Corporation
Inventor: Gennady Goltman , Yongping Fan
IPC: H03L5/00 , G01R19/04 , H03L7/099 , G01R19/165
CPC classification number: H03L5/00 , G01R19/04 , G01R19/16576 , H03L7/099
Abstract: In some embodiments, disclosed is an AC amplitude detector to compare the magnitude of an AC signal against a detector threshold level and to provide an indication as to whether the AC magnitude is larger or smaller than the detector threshold level.
Abstract translation: 在一些实施例中,公开了一种AC振幅检测器,用于将AC信号的幅度与检测器阈值电平进行比较,并提供关于AC幅度是大于还是小于检测器阈值电平的指示。
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公开(公告)号:US20140218123A1
公开(公告)日:2014-08-07
申请号:US13976942
申请日:2012-03-13
Applicant: INTEL CORPORATION
Inventor: Fangxing Wei , Yongping Fan
IPC: H03B5/04
CPC classification number: H03B5/04 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1265
Abstract: A temperature compensation apparatus may include a sense circuit configured to produce a sense voltage that is dependent on temperature and a temperature compensation circuit configured to receive the sense voltage and produce a temperature compensation control signal to control a compensation capacitor array of an oscillator. The temperature compensation circuit may be configured to calibrate the control signal to have a first value at a first temperature. The temperature compensation circuit may also be configured to calibrate a trimming level (e.g., slope) of the control signal.
Abstract translation: 温度补偿装置可以包括被配置为产生取决于温度的感测电压的感测电路和被配置为接收感测电压并产生温度补偿控制信号以控制振荡器的补偿电容器阵列的温度补偿电路。 温度补偿电路可以被配置为校准控制信号以具有处于第一温度的第一值。 温度补偿电路还可以被配置为校准控制信号的微调电平(例如,斜率)。
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公开(公告)号:US20210391826A1
公开(公告)日:2021-12-16
申请号:US16898254
申请日:2020-06-10
Applicant: Intel Corporation
Inventor: Dongseok Shin , Hyung Seok Kim , Yongping Fan
Abstract: A frequency doubler (tripler, or quadrupler) employs current re-use coupled oscillator technique to enhance phase noise without increasing current consumption. Frequency doubler uses coupling between two oscillators running at different frequencies; a first oscillator is running at the target frequency and a second oscillator is running at half the frequency. The coupling between the two oscillators is via a transformer having a primary transformer coil and a secondary transformer coil. The first oscillator comprises a differential inductor, coarse/fine tuning capacitor arrays, and an n-type trans-conductor (GM). A virtual ground node of the n-type GM is coupled to one side of the primary transformer coil and the other side of the primary coil is coupled to the center tap of the secondary coil. The second oscillator comprises the secondary coil, coarse/fine tuning capacitor arrays, n-type GM, frequency tracking loop (FTL) and 2nd-harmonic LC filter network.
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公开(公告)号:US10574243B2
公开(公告)日:2020-02-25
申请号:US15414518
申请日:2017-01-24
Applicant: Intel Corporation
Inventor: Kuan-Yueh Shen , Yongping Fan
Abstract: An apparatus is provided which comprises: an oscillator to generate a first clock having a first frequency; a divider coupled to the oscillator, wherein the divider is to generate a second clock having a second frequency; and a current reference generator comprising a switched capacitor circuitry which is to receive the second clock directly or indirectly.
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公开(公告)号:US09344094B2
公开(公告)日:2016-05-17
申请号:US13837070
申请日:2013-03-15
Applicant: Intel Corporation
Inventor: Jeffrey W. Waldrip , Yongping Fan , Jing Li
CPC classification number: H03L1/022 , H03B5/04 , H03B5/08 , H03L7/087 , H03L7/099 , H03L7/103 , H03L2207/06 , H04L7/033
Abstract: In some embodiments, provided are AFC circuits and methods for calibrating a second setting of an oscillator while a first setting is controlled by a temperature compensated control.
Abstract translation: 在一些实施例中,提供了AFC电路和用于校准振荡器的第二设置的方法,而第一设置由温度补偿控制来控制。
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公开(公告)号:US20220100221A1
公开(公告)日:2022-03-31
申请号:US17033571
申请日:2020-09-25
Applicant: Intel Corporation
Inventor: You Li , David Duarte , Yongping Fan
Abstract: A low power hybrid reverse (LPHR) bandgap reference (BGR) and digital temperature sensor (DTS) or a digital thermometer, which utilizes subthreshold metal oxide semiconductor (MOS) transistor and the PNP parasitic Bi-polar Junction Transistor (BJT) device to form a reverse BGR that serves as the base for configurable BGR or DTS operating modes. The LPHR architecture uses low-cost MOS transistors and the standard parasitic PNP device. Based on a reverse bandgap voltage, the LPHR can work as a configurable BGR. By comparing the configurable BGR with the scaled base-emitter voltage, the circuit can also perform as a DTS with a linear transfer function with single-temperature trim for high accuracy.
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