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公开(公告)号:US11971827B2
公开(公告)日:2024-04-30
申请号:US17438852
申请日:2019-06-21
申请人: Intel Corporation
IPC分类号: G06F12/1009 , G06F9/455 , G06F9/48 , G06F12/109
CPC分类号: G06F12/1009 , G06F9/45558 , G06F9/4812 , G06F12/109 , G06F2009/45583 , G06F2212/657
摘要: Methods, apparatus, systems and articles of manufacture to control address space isolation in a virtual machine are disclosed. An example apparatus includes an address width adjustor to identify a memory width value corresponding to a guest memory associated with a virtual machine (VM), and generate an expanded emulated memory width value. The example apparatus also includes a memory mirror manager to generate a first guest physical address (GPA) range based on the memory width value, and generate a second GPA range based on the expanded emulated memory width value. The example apparatus also includes an EPT generator to generate root paging structures of a first type of EPT with respective addresses within the first GPA range, and generate root paging structures of a second type of EPT with respective addresses within (a) the first GPA range and (b) the second GPA range.
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公开(公告)号:US11742275B2
公开(公告)日:2023-08-29
申请号:US17566523
申请日:2021-12-30
申请人: Intel Corporation
发明人: Zhiguo Qian , Kemal Aygun , Yu Zhang
IPC分类号: H01L23/498 , H01L21/48
CPC分类号: H01L23/49827 , H01L23/49816 , H01L23/49838 , H01L21/486 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
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公开(公告)号:US20220100675A1
公开(公告)日:2022-03-31
申请号:US17438852
申请日:2019-06-21
申请人: Intel Corporation
IPC分类号: G06F12/1009 , G06F12/109 , G06F9/455 , G06F9/48
摘要: Methods, apparatus, systems and articles of manufacture to control address space isolation in a virtual machine are disclosed. An example apparatus includes an address width adjustor to identify a memory width value corresponding to a guest memory associated with a virtual machine (VM), and generate an expanded emulated memory width value. The example apparatus also includes a memory mirror manager to generate a first guest physical address (GPA) range based on the memory width value, and generate a second GPA range based on the expanded emulated memory width value. The example apparatus also includes an EPT generator to generate root paging structures of a first type of EPT with respective addresses within the first GPA range, and generate root paging structures of a second type of EPT with respective addresses within (a) the first GPA range and (b) the second GPA range.
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公开(公告)号:US20210216871A1
公开(公告)日:2021-07-15
申请号:US17256121
申请日:2018-09-07
申请人: Intel Corporation
发明人: Yu Zhang , Huifeng LE , Richard CHUANG , Metz WERNER, Jr. , Heng Juen HAN , Ning ZHANG , Wenjian SHAO , Ke HE
摘要: Processes and systems are disclosed. The processes and systems are arranged to apply convolution for a CNN where the CNN is simplified using sparse techniques, quantization techniques or both sparse and quantization techniques. A location vector (LV) table is provided to record the coordinates of non-zero weights. A look up table is provided to recover the real weight value from the weight identification. Convolution is applied by retrieving the coordinates of the next non-zero weight and the associated real weight value and by accumulating the multiplication of the real weight value and the input value across the input activation plane.
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公开(公告)号:US20210057321A1
公开(公告)日:2021-02-25
申请号:US17074820
申请日:2020-10-20
申请人: Intel Corporation
发明人: Zhiguo Qian , Kemal Aygun , Yu Zhang
IPC分类号: H01L23/498
摘要: Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
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公开(公告)号:US20170148714A1
公开(公告)日:2017-05-25
申请号:US15369659
申请日:2016-12-05
申请人: Intel Corporation
发明人: Zhiguo Qian , Kemal Aygun , Yu Zhang
IPC分类号: H01L23/498 , H01L21/48
CPC分类号: H01L23/49827 , H01L21/486 , H01L23/49816 , H01L23/49838 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
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公开(公告)号:US09515017B2
公开(公告)日:2016-12-06
申请号:US14943880
申请日:2015-11-17
申请人: Intel Corporation
发明人: Zhiguo Qian , Kemal Aygun , Yu Zhang
IPC分类号: H01L23/52 , H01L23/498
CPC分类号: H01L23/49827 , H01L21/486 , H01L23/49816 , H01L23/49838 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
摘要翻译: 本公开的实施例涉及用于集成电路(IC)组件中用于串扰缓解的地面通过群集的技术和配置。 在一些实施例中,IC封装组件可以包括被配置为在管芯和第二封装衬底之间路由输入/输出(I / O)信号和接地的第一封装衬底。 第一封装衬底可以包括设置在第一封装衬底的一侧上的多个触点和相同的通孔层的至少两个接地通孔,并且所述至少两个接地通孔可以形成一组接地通孔, 个人联系。 可以描述和/或要求保护其他实施例。
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公开(公告)号:US11960422B2
公开(公告)日:2024-04-16
申请号:US17431739
申请日:2019-03-28
申请人: Intel Corporation
IPC分类号: G06F13/28
CPC分类号: G06F13/28
摘要: Systems, apparatuses and methods may provide for a frontend driver that notifies a hypervisor of a map request from a guest driver of a device, wherein the device is passed through to and directly controlled by a virtual machine, and wherein the map request is associated with an attempt of the device to access a guest memory page in a virtualized execution environment. The frontend driver may also determine whether the guest memory page is pinned and send a map hypercall to the hypervisor if the guest memory page is not pinned. Additionally, the hypervisor may determine that the guest memory page is pinned, determine, based on a direct memory access (DMA) bitmap, that an unmap request from the guest driver has been issued, and unpin the guest memory page.
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公开(公告)号:US11901280B2
公开(公告)日:2024-02-13
申请号:US17956766
申请日:2022-09-29
申请人: Intel Corporation
发明人: Zhiguo Qian , Kemal Aygun , Yu Zhang
IPC分类号: H01L23/498 , H01L21/48
CPC分类号: H01L23/49827 , H01L23/49816 , H01L23/49838 , H01L21/486 , H01L2924/0002 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
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10.
公开(公告)号:US20240005649A1
公开(公告)日:2024-01-04
申请号:US18017050
申请日:2020-09-07
申请人: Intel Corporation
发明人: Anbang Yao , Xiao Zhou , Guangli Zhang , Yu Zhang , Dian Gu
CPC分类号: G06V10/82 , G06V10/7715 , G06V10/449
摘要: Techniques related to poly-scale kernel-wise convolutional neural network layers are discussed. A poly-scale kernel-wise convolutional neural network layer is applied to an input volume to generate an output volume and include filters each having a number of filter kernels with the same sample rate and differing dilation rates optionally in a repeating pattern of dilation rate groups within each of filters with the pattern of dilation rate groups offset between the filters the poly-scale kernel-wise convolutional neural network layer.
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