公开(公告)号：US11018114B2

公开(公告)日：2021-05-25

申请号：US16515979

申请日：2019-07-18

申请人： Intel IP Corporation

发明人： Bernd Waidhas ,  Georg Seidemann ,  Andreas Augustin ,  Laurent Millou ,  Andreas Wolter ,  Reinhard Mahnkopf ,  Stephan Stoeckl ,  Thomas Wagner

IPC分类号： H01L25/10 ,  H01L25/065 ,  H01L21/48 ,  H01L23/48 ,  H01L25/00 ,  H01L23/427 ,  G06F15/76

摘要： A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups.

公开(公告)号：US20190393130A1

公开(公告)日：2019-12-26

申请号：US16018268

申请日：2018-06-26

申请人： Intel IP Corporation

发明人： Reinhard Mahnkopf ,  Sonja Koller ,  Andreas Wolter

IPC分类号： H01L23/373 ,  H01L27/12 ,  H01L23/367 ,  H01L23/00 ,  H01L23/498 ,  H01L21/768

摘要： Present disclosure relates to IC devices with thermal mitigation structures in the form of metal structures provided in a semiconductor material of a substrate on which active electronic devices are integrated (i.e., front-end metal structures). In one aspect, an IC device includes a substrate having a first face and a second face, where at least one active electronic device is integrated at the first face of the substrate. The IC device further includes at least one front-end metal structure that extends from the first face of the substrate into the substrate to a depth that is smaller than a distance between the first face and the second face. Providing front-end metal structures may enable improved cooling options because such structures may be placed in closer vicinity to the active electronic devices, compared to conventional thermal mitigation approaches.

公开(公告)号：US20180186627A1

公开(公告)日：2018-07-05

申请号：US15857461

申请日：2017-12-28

申请人： Intel IP Corporation

发明人： Gerald Ofner ,  Thorsten Meyer ,  Reinhard Mahnkopf ,  Christian Geissler ,  Andreas Augustin

IPC分类号： B81C1/00 ,  B81B7/00

CPC分类号： B81C1/00238 ,  B81B7/008 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/025 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/10 ,  B81B2207/012 ,  B81B2207/053 ,  B81B2207/07 ,  B81B2207/096 ,  B81C1/0023 ,  B81C2203/0792 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/15311 ,  H01L2924/00014

摘要： In embodiments, a package assembly may include an application-specific integrated circuit (ASIC) and a microelectromechanical system (MEMS) having an active side and an inactive side. In embodiments, the MEMS may be coupled directly to the ASIC by way of one or more interconnects. The MEMS, ASIC, and one or more interconnects may define or form a cavity such that the active portion of the MEMS is within the cavity. In some embodiments, the package assembly may include a plurality of MEMS coupled directly to the ASIC by way of a plurality of one or more interconnects. Other embodiments may be described and/or claimed.

公开(公告)号：US09663353B2

公开(公告)日：2017-05-30

申请号：US14403571

申请日：2013-06-28

申请人： Intel IP Corporation

发明人： Gerald Ofner ,  Thorsten Meyer ,  Reinhard Mahnkopf ,  Christian Geissler ,  Andreas Augustin

IPC分类号： H01L27/14 ,  B81B7/00 ,  B81C1/00

CPC分类号： B81C1/00238 ,  B81B7/008 ,  B81B2201/0235 ,  B81B2201/0242 ,  B81B2201/025 ,  B81B2201/0257 ,  B81B2201/0264 ,  B81B2201/0271 ,  B81B2201/10 ,  B81B2207/012 ,  B81B2207/053 ,  B81B2207/07 ,  B81B2207/096 ,  B81C1/0023 ,  B81C2203/0792 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/15311 ,  H01L2924/00014

摘要： In embodiments, a package assembly may include an application-specific integrated circuit (ASIC) and a microelectromechanical system (MEMS) having an active side and an inactive side. In embodiments, the MEMS may be coupled directly to the ASIC by way of one or more interconnects. The MEMS, ASIC, and one or more interconnects may define or form a cavity such that the active portion of the MEMS is within the cavity. In some embodiments, the package assembly may include a plurality of MEMS coupled directly to the ASIC by way of a plurality of one or more interconnects. Other embodiments may be described and/or claimed.

公开(公告)号：US11145577B2

公开(公告)日：2021-10-12

申请号：US16349359

申请日：2016-12-29

申请人： Intel IP Corporation

发明人： Sonja Koller ,  Georg Seidemann ,  Reinhard Mahnkopf ,  Bernd Waidhas

IPC分类号： H01L23/495 ,  H01L23/367 ,  H01L23/373 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00

摘要： A system-in-package apparatus includes a square wave lead frame that provides a recess for a first semiconductive device as well as a feature for a second device. The system-in-package apparatus includes a printed wiling board that is wrapped onto the lead frame after a manner to enclose the first semiconductive device into the recess.

公开(公告)号：US20200043826A1

公开(公告)日：2020-02-06

申请号：US16467582

申请日：2016-12-30

申请人： Intel IP Corporation

发明人： Sonja Koller ,  Reinhard Mahnkopf

IPC分类号： H01L23/367 ,  H01L23/538 ,  H01L23/10

摘要： A system-in-package apparatus includes a contoured heat sink that provides a first recess and a subsequent recess. The system-in-package apparatus includes a flexible printed wiring board that is wrapped onto the contoured heat sink after a manner to enclose the first semiconductive device into the first recess and a semiconductive device in the subsequent recess.

公开(公告)号：US10535578B2

公开(公告)日：2020-01-14

申请号：US15719653

申请日：2017-09-29

申请人： Intel IP Corporation

发明人： Reinhard Mahnkopf ,  Andreas Wolter ,  Sonja Koller

IPC分类号： H01L21/48 ,  H01L23/367 ,  H01L27/02 ,  H01L23/498 ,  H01L21/762 ,  H01L27/12 ,  H01L23/373 ,  H01L25/065 ,  H01L21/84

摘要： A semiconductor device includes a plurality of circuit regions formed at a circuit semiconductor layer of a semiconductor die. The semiconductor device includes an etch stop layer of the semiconductor die arranged between the circuit semiconductor layer of the semiconductor die and a handling layer of the semiconductor die. The semiconductor device includes one or more trench structures extending through the handling layer of the semiconductor die. The one or more trench structures extends to at least the etch stop layer and to at most the circuit semiconductor layer of the semiconductor die.

公开(公告)号：US20190267312A1

公开(公告)日：2019-08-29

申请号：US16349359

申请日：2016-12-29

申请人： Intel IP Corporation

发明人： Sonja Koller ,  Georgg Seidemann ,  Reinhard Mahnkopf ,  Bernd Waidhas

IPC分类号： H01L23/495 ,  H01L23/498 ,  H01L23/538 ,  H01L23/367 ,  H01L23/373

摘要： A system-in-package apparatus includes a square wave lead frame that provides a recess for a first semiconductive device as well as a feature for a second device. The system-in-package apparatus includes a printed wiling board that is wrapped onto the lead frame after a manner to enclose the first semiconductive device into the recess.

公开(公告)号：US10301176B2

公开(公告)日：2019-05-28

申请号：US15857461

申请日：2017-12-28

申请人： Intel IP Corporation

发明人： Gerald Ofner ,  Thorsten Meyer ,  Reinhard Mahnkopf ,  Christian Geissler ,  Andreas Augustin

IPC分类号： B81B7/00 ,  B81C1/00

摘要： In embodiments, a package assembly may include an application-specific integrated circuit (ASIC) and a microelectromechanical system (MEMS) having an active side and an inactive side. In embodiments, the MEMS may be coupled directly to the ASIC by way of one or more interconnects. The MEMS, ASIC, and one or more interconnects may define or form a cavity such that the active portion of the MEMS is within the cavity. In some embodiments, the package assembly may include a plurality of MEMS coupled directly to the ASIC by way of a plurality of one or more interconnects. Other embodiments may be described and/or claimed.

公开(公告)号：US11410908B2

公开(公告)日：2022-08-09

申请号：US16018268

申请日：2018-06-26

申请人： Intel IP Corporation

发明人： Reinhard Mahnkopf ,  Sonja Koller ,  Andreas Wolter

IPC分类号： H01L23/373 ,  H01L27/12 ,  H01L23/367 ,  H01L23/498 ,  H01L21/768 ,  H01L23/00

摘要： Present disclosure relates to IC devices with thermal mitigation structures in the form of metal structures provided in a semiconductor material of a substrate on which active electronic devices are integrated (i.e., front-end metal structures). In one aspect, an IC device includes a substrate having a first face and a second face, where at least one active electronic device is integrated at the first face of the substrate. The IC device further includes at least one front-end metal structure that extends from the first face of the substrate into the substrate to a depth that is smaller than a distance between the first face and the second face. Providing front-end metal structures may enable improved cooling options because such structures may be placed in closer vicinity to the active electronic devices, compared to conventional thermal mitigation approaches.