公开(公告)号：US20140162447A1

公开(公告)日：2014-06-12

申请号：US13709250

申请日：2012-12-10

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES, INC. ,  RENESAS ELECTRONICS CORPORATION

发明人： Lisa F. Edge ,  Martin M. Frank ,  Balasubramanian S. Haran ,  Atsuro Inada ,  Sivananda K. Kanakasabapathy ,  Andreas Knorr ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Soon-cheon Seo

IPC分类号： H01L21/28

CPC分类号： H01L29/66795 ,  H01L29/41791

摘要： A method for fabricating a field effect transistor device includes patterning a fin on substrate, patterning a gate stack over a portion of the fin and a portion of an insulator layer arranged on the substrate, forming a protective barrier over the gate stack, a portion of the fin and a portion of the insulator layer, the protective barrier enveloping the gate stack, depositing a second insulator layer over portions of the fin and the protective barrier, performing a first etching process to selectively remove portions of the second insulator layer to define cavities that expose portions of source and drain regions of the fin without appreciably removing the protective barrier, and depositing a conductive material in the cavities.

摘要翻译： 一种用于制造场效应晶体管器件的方法，包括对衬底上的翅片进行图案化，在栅极堆叠的一部分上构图栅极堆叠，以及布置在衬底上的绝缘体层的一部分，在栅极叠层上形成保护屏障， 所述翅片和所述绝缘体层的一部分，所述保护屏障包围所述栅极堆叠，在所述鳍片和所述保护屏障的部分上沉积第二绝缘体层，执行第一蚀刻工艺以选择性地去除所述第二绝缘体层的部分以限定空腔 其暴露鳍片的源极和漏极区域的部分，而不明显地去除保护屏障，以及在空腔中沉积导电材料。

公开(公告)号：US09634009B1

公开(公告)日：2017-04-25

申请号：US14974436

申请日：2015-12-18

申请人： International Business Machines Corporation

发明人： Atsuro Inada ,  Sivananda K. Kanakasabapathy

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/66 ,  H01L29/06 ,  H01L21/311

CPC分类号： H01L27/0924 ,  H01L21/31105 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L29/0649 ,  H01L29/4975 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7856

摘要： A fin-type field effect transistor (finFET) device includes a gate disposed over at least two fins, each fin defining a source outboard portion and a drain outboard portion extending beyond the gate. There is a source contact that electrically connects the source outboard portions of the fins, and similarly on the opposed side of the gate there is a drain contact electrically connecting the drain outboard portions of the fins. A first dielectric spacer layer is disposed adjacent to the gate and overlying the fins, and a second dielectric spacer layer is disposed adjacent to the first spacer layer and also overlying the fins. The second dielectric spacer layer electrically isolates the gate from the drain contact and/or from the source contact. A method of making a finFET device is also detailed.