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公开(公告)号：US20040257086A1
公开(公告)日：2004-12-23
申请号：US10250272
申请日：2003-06-19
IPC分类号： G01R031/02 , G01R031/327
CPC分类号： H01H11/0062 , B81C99/005 , H01H59/0009
摘要： A system and method are provided for testing performance characteristics of a MEMs device. The system includes an activation driver configured to receive and drive a waveform to an activation side of the micro electromechanical device and configured to provide readback of an activation voltage and activation current drawn by activation of the micro electromechanical device. The system further includes a switch driver configured to provide a load to a switch side of the micro electromechanical device and configured to provide readback of a load voltage and a load current drawn by the micro electromechanical device. It also contains a contact-closure counter. A master control card (MCC) is included to control the activation and switch drivers while a digital volt meter (DVM) is in operable communication with the micro electromechanical device to read back analog readback. An analog multiplexer is configured to provide the analog readback to a corresponding activation driver or switch driver. A computer having software configured to provide system control, data acquisition, data storage, and data analysis is in operable communication with the multiplexer, DVM and MCC
摘要翻译： 提供了一种用于测试MEMs设备的性能特性的系统和方法。 该系统包括激活驱动器，其被配置为接收并驱动波形到微机电装置的激活侧，并且被配置为提供通过微机电装置的激活而绘制的激活电压和激活电流的回读。 该系统还包括开关驱动器，其被配置为向微机电装置的开关侧提供负载，并且被配置为提供由微机电装置抽取的负载电压和负载电流的回读。 它还包含一个触点闭合计数器。 包含主控卡（MCC）以控制激活和切换驱动器，而数字电压表（DVM）可与微机电装置可操作地通信以读回模拟回读。 模拟多路复用器被配置为向对应的激活驱动器或开关驱动器提供模拟回读。 具有被配置为提供系统控制，数据采集，数据存储和数据分析的软件的计算机与多路复用器DVM和MCC可操作地通信
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2.发明申请Low dielectric constant material reinforcement for improved electromigration reliability 失效低介电常数材料增强，提高电迁移可靠性公开(公告)号：US20030116855A1
公开(公告)日：2003-06-26
申请号：US10026117
申请日：2001-12-21
IPC分类号： H01L023/48 , H01L023/52 , H01L029/40
CPC分类号： H01L23/522 , H01L23/5283 , H01L2924/0002 , H01L2924/00
摘要： A reinforced semiconductor interconnect structure, having the following components: A first metal interconnect disposed in a first material, the first metal interconnect having a line portion and at least one via portion, an anode section and a cathode section, the via portion of the first metal interconnect located in the anode section, the line portion of the first metal interconnect having a top, bottom and terminus side, wherein at least a part of the bottom side of the line portion of the first metal interconnect in contact with the first dielectric; a first reinforcement disposed in the first material, the first reinforcement in contact with at least the bottom side of the first metal interconnect, the first reinforcement comprising a second material, the second material being electrically nonconductive; and wherein the second material has a greater mechanical rigidity than the first material.
摘要翻译： 一种加强型半导体互连结构，具有以下部件：设置在第一材料中的第一金属互连件，所述第一金属互连件具有线部分和至少一个通孔部分，阳极部分和阴极部分，所述第一 位于阳极部分的金属互连，第一金属互连线的线部分具有顶部，底部和末端侧，其中第一金属互连线路部分的底侧的至少一部分与第一电介质接触; 所述第一加强件设置在所述第一材料中，所述第一加强件至少与所述第一金属互连件的底侧接触，所述第一加强件包括第二材料，所述第二材料是不导电的; 并且其中所述第二材料具有比所述第一材料更大的机械刚度。
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3.发明申请Test structure for locating electromigration voids in dual damascene interconnects 失效用于定位双镶嵌互连中电迁移空隙的测试结构公开(公告)号：US20040026693A1
公开(公告)日：2004-02-12
申请号：US10214546
申请日：2002-08-07
IPC分类号： H01L023/58
CPC分类号： H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A test structure is disclosed for locating electromigration voids in a semiconductor interconnect structure having an interconnect via interconnecting a lower metallization line with an upper metallization line. In an exemplary embodiment, the test structure includes a via portion the top of the interconnect via at the upper metallization line. In addition, a line portion extends from the via portion, wherein the line portion connects to an external probing surface, in addition to a probing surface on the lower metallization line, thereby allowing the identification of any electromigration voids present in the interconnect via.
摘要翻译： 公开了一种测试结构，用于通过将下部金属化线与上部金属化线相互连接来定位具有互连的半导体互连结构中的电迁移空穴。 在示例性实施例中，测试结构包括在上金属化线处的互连通孔的顶部的通孔部分。 此外，线路部分从通孔部分延伸，其中线部分连接到外部探测表面，以及下部金属化线上的探测表面，从而允许识别互连通孔中存在的任何电迁移空隙。
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4.发明申请Multiple material stacks with a stress relief layer between a metal structure and a passivation layer 审中-公开在金属结构和钝化层之间具有应力消除层的多个材料堆叠公开(公告)号：US20020163062A1
公开(公告)日：2002-11-07
申请号：US09793643
申请日：2001-02-26
发明人： Ping-Chuan Wang , Robert Daniel Edwards , John C. Malinowski , Vidhya Ramachandran , Steffen Kaldor
IPC分类号： H01L023/58 , H01L021/302 , H01L029/40 , H01L021/31 , H01L021/461 , H01L023/48
CPC分类号： H01L21/02134 , H01L21/02164 , H01L21/022 , H01L21/02282 , H01L21/3124 , H01L21/3144 , H01L21/76832 , H01L21/76834 , H01L23/3192 , H01L23/5329 , H01L23/53295 , H01L23/645 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A structure/method for reducing the stress between a dielectric, passivation layer and a metallic structure comprising coating the metallic structure with a low stress modulus buffer material, and forming the dielectric passivation layer covering the low stress modulus buffer material. The low stress modulus buffer material is composed of a layer of a polymeric material selected from at least one of the group consisting of a hydrogen/alkane SQ (SilsesQuioxane) resin, polyimide, and a polymer resin. The dielectric, passivation layer is composed of at least one layer of a material selected from at least one of the group consisting of silicon oxide and silicon nitride. A protective layer is formed over the dielectric, passivation layer. The low stress modulus buffer material has a thermal coefficient of expansion between that of the metallic structure and that of the dielectric passivation layer. In particular, the dielectric passivation layer between the metallic structure and the low stress modulus buffer material has a thermal coefficient of expansion between about 5 ppm/null C. and about 20 ppm/null C.
摘要翻译： 一种用于减小电介质，钝化层和金属结构之间的应力的结构/方法，包括用低应力模量缓冲材料涂覆金属结构，以及形成覆盖低应力模量缓冲材料的电介质钝化层。 低应力模量缓冲材料由选自氢/烷烃SQ（SilsesQuioxane）树脂，聚酰亚胺和聚合物树脂中的至少一种的聚合材料层组成。 电介质钝化层由至少一层选自氧化硅和氮化硅中的至少一种的材料组成。 在电介质钝化层上形成保护层。 低应力模量缓冲材料具有在金属结构和介电钝化层的热膨胀系数之间的热膨胀系数。 特别地，金属结构和低应力模量缓冲材料之间的介电钝化层的热膨胀系数在约5ppm /℃至约20ppm /℃之间。
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