公开(公告)号：US09221676B2

公开(公告)日：2015-12-29

申请号：US14590839

申请日：2015-01-06

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael Julian Daneman ,  Joseph Seeger

IPC: B81C1/00

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。

公开(公告)号：US08822252B2

公开(公告)日：2014-09-02

申请号：US14033366

申请日：2013-09-20

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael Julian Daneman ,  Joseph Seeger

IPC: H01L21/00

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。

公开(公告)号：US08564076B1

公开(公告)日：2013-10-22

申请号：US13754462

申请日：2013-01-30

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael J. Daneman ,  Joseph Seeger

IPC: H01L27/14

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A MEMS device is disclosed. The MEMS device comprises a MEMS substrate. The MEMS substrate includes a first semiconductor layer connected to a second semiconductor layer with a dielectric layer in between. MEMS structures are formed from the second semiconductor layer and include a plurality of first conductive pads. The MEMS device further includes a base substrate which includes a plurality of second conductive pads thereon. The second conductive pads are connected to the first conductive pads. Finally, the MEMS device includes a conductive connector formed through the dielectric layer of the MEMS substrate to provide electrical coupling between the first semiconductor layer and the second semiconductor layer. The base substrate is electrically connected to the second semiconductor layer and the first semiconductor layer.

Abstract translation: 公开了MEMS器件。 MEMS器件包括MEMS衬底。 MEMS基板包括连接到第二半导体层的第一半导体层，其间具有介电层。 MEMS结构由第二半导体层形成并且包括多个第一导电焊盘。 MEMS器件还包括在其上包括多个第二导电焊盘的基底基板。 第二导电焊盘连接到第一导电焊盘。 最后，MEMS器件包括通过MEMS衬底的电介质层形成的导电连接器，以提供第一半导体层和第二半导体层之间的电耦合。 基底基板电连接到第二半导体层和第一半导体层。

公开(公告)号：US08513747B1

公开(公告)日：2013-08-20

申请号：US13711070

申请日：2012-12-11

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Martin Lim ,  Steven S. Nasiri

IPC: H01L29/84

CPC classification number: B81B3/0051 ,  B81B7/02 ,  B81B2201/025 ,  B81B2201/0271 ,  B81C1/00293 ,  H01L29/0657

Abstract: An integrated MEMS device comprises a wafer where the wafer contains two or more cavities of different depths. The MEMS device includes one movable structure within a first cavity of a first depth and a second movable structure within a second cavity of a second depth. The cavities are sealed to maintain different pressures for the different movable structures for optimal operation. MEMS stops can be formed in the same multiple cavity depth processing flow. The MEMS device can be integrated with a CMOS wafer.

Abstract translation: 集成MEMS器件包括晶片，其中晶片包含两个或更多个不同深度的空腔。 MEMS器件包括在第一深度的第一腔内的一个可移动结构和在第二深度的第二腔内的第二可移动结构。 空腔被密封以保持不同的可移动结构的不同压力以实现最佳操作。 可以在相同的多腔深度处理流程中形成MEMS止动件。 MEMS器件可以与CMOS晶片集成。

公开(公告)号：US10850973B2

公开(公告)日：2020-12-01

申请号：US16698535

申请日：2019-11-27

Applicant: INVENSENSE, INC.

Inventor： Michael Daneman ,  Martin Lim ,  Kegang Huang ,  Igor Tchertkov

IPC: B81B7/02 ,  B81C1/00

Abstract: A Microelectromechanical systems (MEMS) structure comprises a MEMS wafer. A MEMS wafer includes a handle wafer with cavities bonded to a device wafer through a dielectric layer disposed between the handle and device wafers. The MEMS wafer also includes a moveable portion of the device wafer suspended over a cavity in the handle wafer. Four methods are described to create two or more enclosures having multiple gas pressure or compositions on a single substrate including, each enclosure containing a moveable portion. The methods include: A. Forming a secondary sealed enclosure, B. Creating multiple ambient enclosures during wafer bonding, C. Creating and breaching an internal gas reservoir, and D. Forming and subsequently sealing a controlled leak/breach into the enclosure.

公开(公告)号：US08945969B2

公开(公告)日：2015-02-03

申请号：US14456973

申请日：2014-08-11

Applicant: InvenSense, Inc.

Inventor： Kegang Huang ,  Jongwoo Shin ,  Martin Lim ,  Michael Julian Daneman ,  Joseph Seeger

IPC: H01L21/00 ,  B81C1/00

CPC classification number: B81C1/00301 ,  B81B7/0064 ,  B81B2207/098 ,  B81C1/00269 ,  B81C2203/0118 ,  B81C2203/019 ,  B81C2203/031

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.

公开(公告)号：US10532926B2

公开(公告)日：2020-01-14

申请号：US15358956

申请日：2016-11-22

Applicant: INVENSENSE, INC.

Inventor： Michael Daneman ,  Martin Lim ,  Kegang Huang ,  Igor Tchertkov

IPC: B81B7/02 ,  B81C1/00

Abstract: A Microelectromechanical systems (MEMS) structure comprises a MEMS wafer. A MEMS wafer includes a handle wafer with cavities bonded to a device wafer through a dielectric layer disposed between the handle and device wafers. The MEMS wafer also includes a moveable portion of the device wafer suspended over a cavity in the handle wafer. Four methods are described to create two or more enclosures having multiple gas pressure or compositions on a single substrate including, each enclosure containing a moveable portion. The methods include: A. Forming a secondary sealed enclosure, B. Creating multiple ambient enclosures during wafer bonding, C. Creating and breaching an internal gas reservoir, and D. Forming and subsequently sealing a controlled leak/breach into the enclosure.