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1.发明申请Method of fabricating CMUTs that generate low-frequency and high-intensity ultrasound 审中-公开制造产生低频和高强度超声的CMUT的方法公开(公告)号：US20100173437A1
公开(公告)日：2010-07-08
申请号：US12589364
申请日：2009-10-21
IPC分类号： H01L21/302
CPC分类号： B81C1/00182 , B06B1/0292 , B81B2203/0127 , B81C2201/019 , B81C2201/0191
摘要： The present invention provides a method of fabricating low-frequency and high-intensity ultrasound CMUTs that includes using deep reactive ion (DRIE) etching to etch at least one cavity in a first surface of a conductive silicon wafer, growing an insulating layer on at least the first surface of the conductive silicon wafer, bonding a silicon layer of a SOI wafer to the insulating layer, where the SOI wafer includes a handle layer, a buried oxide layer and a conductive silicon layer. The handle layer and the buried oxide layer of the SOI wafer are removed, where the conductive layer of the SOI wafer forms a membrane across at least one cavity, and electrically isolating at least one the membrane across the at least one cavity, where at least one the low-frequency and high-intensity ultrasound CMUT is provided.
摘要翻译： 本发明提供一种制造低频和高强度超声CMUT的方法，其包括使用深反应离子（DRIE）蚀刻来蚀刻导电硅晶片的第一表面中的至少一个空腔，至少在绝缘层上生长 导电硅晶片的第一表面，将SOI晶片的硅层接合到绝缘层，其中SOI晶片包括手柄层，掩埋氧化物层和导电硅层。 去除SOI晶片的处理层和掩埋氧化物层，其中SOI晶片的导电层在至少一个空腔上形成膜，并且跨过至少一个空腔电隔离至少一个膜，其中至少 一个是提供低频和高强度超声CMUT。
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公开(公告)号：US07846102B2
公开(公告)日：2010-12-07
申请号：US12288575
申请日：2008-10-20
CPC分类号： H02N1/008 , B06B1/0292 , Y10T29/49005
摘要： A capacitive micromachined ultrasonic transducer (CMUT) array connected to a separate electronic unit is provided. The CMUT array includes at least two active elements, a ground element at the array end, and a non-active element having isolation trenches disposed between the active and ground elements. The active element includes a doped first silicon layer, a doped second silicon layer, and a first insulating layer disposed there between. A cavity is in the first silicon layer having a cross section that includes vertical portions disposed at each end of a horizontal portion, and the vertical portion spans from the first insulating layer through the first silicon layer such that a portion of the first silicon layer is isolated by the first insulating layer and the cavity. A membrane layer on the first silicon layer spans the cavity. A bottom electrode is disposed on the bottom of the second silicon layer.
摘要翻译： 提供连接到单独的电子单元的电容微机械超声换能器（CMUT）阵列。 CMUT阵列包括至少两个有源元件，阵列端的接地元件以及设置在有源和接地元件之间的具有隔离沟道的非有源元件。 有源元件包括掺杂的第一硅层，掺杂的第二硅层和设置在其间的第一绝缘层。 空腔在第一硅层中，其横截面包括设置在水平部分的每一端处的垂直部分，并且垂直部分跨越第一绝缘层穿过第一硅层，使得第一硅层的一部分为 由第一绝缘层和空腔隔离。 第一硅层上的膜层跨越空腔。 底部电极设置在第二硅层的底部。
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公开(公告)号：US20090140357A1
公开(公告)日：2009-06-04
申请号：US12288344
申请日：2008-10-17
CPC分类号： H02N1/008 , B06B1/0292 , Y10T29/49005
摘要： A high temperature micromachined ultrasonic transducer (HTCMUT) is provided. The HTCMUT includes a silicon on insulator (SOI) substrate having a doped first silicon layer, a doped second silicon layer, and a first insulating layer disposed between the first and second silicon layers. A cavity is disposed in the first silicon layer, where a cross section of the cavity includes a horizontal cavity portion on top of vertical cavity portions disposed at each end of the horizontal cavity portion, and the vertical cavity portion spans from the first insulating layer through the first silicon layer, such that a portion of the first silicon layer is isolated by the first insulating layer and the cavity. A membrane layer is disposed on the first silicon layer top surface, and spans across the cavity. A bottom electrode is disposed on the bottom of the second silicon layer.
摘要翻译： 提供了一种高温微加工超声波换能器（HTCMUT）。 HTCMUT包括具有掺杂的第一硅层，掺杂的第二硅层和设置在第一和第二硅层之间的第一绝缘层的绝缘体上硅（SOI）衬底。 空腔设置在第一硅层中，其中空腔的横截面包括在设置在水平空腔部分的每个端部处的垂直空腔部分的顶部上的水平空腔部分，并且垂直空腔部分从第一绝缘层穿过 第一硅层，使得第一硅层的一部分被第一绝缘层和空腔隔离。 膜层设置在第一硅层顶表面上，跨越空腔。 底部电极设置在第二硅层的底部。
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公开(公告)号：US07843022B2
公开(公告)日：2010-11-30
申请号：US12288344
申请日：2008-10-17
IPC分类号： H01L29/84
CPC分类号： H02N1/008 , B06B1/0292 , Y10T29/49005
摘要： A high temperature micromachined ultrasonic transducer (HTCMUT) is provided. The HTCMUT includes a silicon on insulator (SOI) substrate having a doped first silicon layer, a doped second silicon layer, and a first insulating layer disposed between the first and second silicon layers. A cavity is disposed in the first silicon layer, where a cross section of the cavity includes a horizontal cavity portion on top of vertical cavity portions disposed at each end of the horizontal cavity portion, and the vertical cavity portion spans from the first insulating layer through the first silicon layer, such that a portion of the first silicon layer is isolated by the first insulating layer and the cavity. A membrane layer is disposed on the first silicon layer top surface, and spans across the cavity. A bottom electrode is disposed on the bottom of the second silicon layer.
摘要翻译： 提供了一种高温微加工超声波换能器（HTCMUT）。 HTCMUT包括具有掺杂的第一硅层，掺杂的第二硅层和设置在第一和第二硅层之间的第一绝缘层的绝缘体上硅（SOI）衬底。 空腔设置在第一硅层中，其中空腔的横截面包括在设置在水平空腔部分的每个端部处的垂直空腔部分的顶部上的水平空腔部分，并且垂直空腔部分从第一绝缘层穿过 第一硅层，使得第一硅层的一部分被第一绝缘层和空腔隔离。 膜层设置在第一硅层顶表面上，跨越空腔。 底部电极设置在第二硅层的底部。
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5.发明申请公开(公告)号：US20100225200A1
公开(公告)日：2010-09-09
申请号：US12660807
申请日：2010-03-03
CPC分类号： B06B1/0292 , Y10T29/49005
摘要： Low temperature wafer bonding (temperature of 450° C. or less) is employed to fabricate CMUTs on a wafer that already includes active electrical devices. The resulting structures are CMUT arrays integrated with active electronics by a low-temperature wafer bonding process. The use of a low-temperature process preserves the electronics during CMUT fabrication. With this approach, it is not necessary to make compromises in the CMUT or electronics designs, as is typical of the sacrificial release fabrication approach. Various disadvantages of sacrificial release, such as low process control, poor design flexibility, low reproducibility, and reduced performance are avoided with the present approach. With this approach, a CMUT array can be provided with per-cell electrodes connected to the substrate integrated circuitry. This enables complete flexibility in electronically assigning the CMUT cells to CMUT array elements.
摘要翻译： 采用低温晶片接合（450℃或更低的温度）在已包括有源电气设备的晶片上制造CMUT。 所得到的结构是通过低温晶片结合工艺与有源电子器件集成的CMUT阵列。 在CMUT制造期间使用低温过程保留电子元件。 采用这种方法，就像在牺牲释放制造方法中一样，不需要在CMUT或电子设计中做出妥协。 本方法避免了牺牲释放的各种缺点，如低过程控制，设计灵活性差，再现性低，性能下降。 利用这种方法，可以提供连接到衬底集成电路的每个单元电极的CMUT阵列。 这使得能够将CMUT单元电子分配给CMUT阵列元件的完全灵活性。
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6.发明授权公开(公告)号：US08402831B2
公开(公告)日：2013-03-26
申请号：US12660807
申请日：2010-03-03
CPC分类号： B06B1/0292 , Y10T29/49005
摘要： Low temperature wafer bonding (temperature of 450° C. or less) is employed to fabricate CMUTs on a wafer that already includes active electrical devices. The resulting structures are CMUT arrays integrated with active electronics by a low-temperature wafer bonding process. The use of a low-temperature process preserves the electronics during CMUT fabrication. With this approach, it is not necessary to make compromises in the CMUT or electronics designs, as is typical of the sacrificial release fabrication approach. Various disadvantages of sacrificial release, such as low process control, poor design flexibility, low reproducibility, and reduced performance are avoided with the present approach. With this approach, a CMUT array can be provided with per-cell electrodes connected to the substrate integrated circuitry. This enables complete flexibility in electronically assigning the CMUT cells to CMUT array elements.
摘要翻译： 采用低温晶片接合（450℃或更低的温度）在已包括有源电气设备的晶片上制造CMUT。 所得到的结构是通过低温晶片结合工艺与有源电子器件集成的CMUT阵列。 在CMUT制造期间使用低温过程保留电子元件。 采用这种方法，就像在牺牲释放制造方法中一样，不需要在CMUT或电子设计中做出妥协。 本方法避免了牺牲释放的各种缺点，如低过程控制，设计灵活性差，再现性低，性能下降。 利用这种方法，可以提供连接到衬底集成电路的每个单元电极的CMUT阵列。 这使得能够将CMUT单元电子分配给CMUT阵列元件的完全灵活性。
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7.发明申请Fabrication of capacitive micromachined ultrasonic transducers by local oxidation 有权通过局部氧化制造电容微机械超声换能器公开(公告)号：US20090142872A1
公开(公告)日：2009-06-04
申请号：US12288009
申请日：2008-10-14
IPC分类号： H01L21/30
CPC分类号： B06B1/0292
摘要： Fabrication methods for capacitive micromachined ultrasonic transducers (CMUTS) with independent and precise gap and post thickness control are provided. The fabrication methods are based on local oxidation or local oxidation of silicon (LOCOS) to grow oxide posts. The process steps enable low surface roughness to be maintained to allow for direct wafer bonding of the membrane. In addition, methods for fabricating a step in a substrate are provided with reduced or minimal over-etch time by utilizing the nonlinearity of oxide growth. The fabrication methods of the present invention produce CMUTs with unmatched uniformity, low parasitic capacitance, and high breakdown voltage.
摘要翻译： 提供了具有独立且精确的间隙和后厚度控制的电容微加工超声波换能器（CMUTS）的制造方法。 制造方法基于硅（LOCOS）的局部氧化或局部氧化以生长氧化物柱。 该工艺步骤使得能够保持低表面粗糙度以允许膜的直接晶片结合。 此外，通过利用氧化物生长的非线性，在衬底中制造步骤的方法具有减小的或最小的过蚀刻时间。 本发明的制造方法产生具有无与伦比的均匀性，低寄生电容和高击穿电压的CMUT。
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公开(公告)号：US20090122651A1
公开(公告)日：2009-05-14
申请号：US12288575
申请日：2008-10-20
CPC分类号： H02N1/008 , B06B1/0292 , Y10T29/49005
摘要： A capacitive micromachined ultrasonic transducer (CMUT) array connected to a separate electronic unit is provided. The CMUT array includes at least two active elements, a ground element at the array end, and a non-active element having isolation trenches disposed between the active and ground elements. The active element includes a doped first silicon layer, a doped second silicon layer, and a first insulating layer disposed there between. A cavity is in the first silicon layer having a cross section that includes vertical portions disposed at each end of a horizontal portion, and the vertical portion spans from the first insulating layer through the first silicon layer such that a portion of the first silicon layer is isolated by the first insulating layer and the cavity. A membrane layer on the first silicon layer spans the cavity. A bottom electrode is disposed on the bottom of the second silicon layer.
摘要翻译： 提供连接到单独的电子单元的电容微机械超声换能器（CMUT）阵列。 CMUT阵列包括至少两个有源元件，阵列端的接地元件以及设置在有源和接地元件之间的具有隔离沟槽的非有源元件。 有源元件包括掺杂的第一硅层，掺杂的第二硅层和设置在其间的第一绝缘层。 空腔在第一硅层中，其横截面包括设置在水平部分的每一端处的垂直部分，并且垂直部分跨越第一绝缘层穿过第一硅层，使得第一硅层的一部分为 由第一绝缘层和空腔隔离。 第一硅层上的膜层跨越空腔。 底部电极设置在第二硅层的底部。
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公开(公告)号：US08276433B2
公开(公告)日：2012-10-02
申请号：US12800635
申请日：2010-05-18
IPC分类号： G01N7/00
CPC分类号： G01N5/02 , G01N29/022 , G01N2015/0038 , G01N2015/1062 , G01N2015/1075 , G01N2035/0097 , G01N2291/02466
摘要： The present invention provides a device that measures at least one property of the liquid or gas, where the invention is a CMUT sensor that includes a substrate, a first layer disposed on the substrate, where the first layer includes a cavity, and a compound plate, where the compound plated includes a bottom plate, an intermediate plate and a top plate. According to the invention, the intermediate plate has at least one sample inlet, a sample cavity and at least one sample outlet, where the bottom plate is disposed on the first layer, and the cavity in the first layer is sealed by the compound plate. The cavity in the first layer can be a vacuum or contain a gas. The CMUT sensor can be disposed in an array of two or more sensors and connected electrically in parallel.
摘要翻译： 本发明提供了一种测量液体或气体的至少一种性能的装置，其中本发明是包括基板的CMUT传感器，设置在基板上的第一层，其中第一层包括空腔，复合板 ，其中复合镀层包括底板，中间板和顶板。 根据本发明，中间板具有至少一个样品入口，样品腔和至少一个样品出口，其中底板设置在第一层上，并且第一层中的空腔被复合板密封。 第一层中的空腔可以是真空或含有气体。 CMUT传感器可以设置在两个或更多个传感器的阵列中，并联电连接。
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公开(公告)号：US20110023582A1
公开(公告)日：2011-02-03
申请号：US12800635
申请日：2010-05-18
IPC分类号： G01N7/00
CPC分类号： G01N5/02 , G01N29/022 , G01N2015/0038 , G01N2015/1062 , G01N2015/1075 , G01N2035/0097 , G01N2291/02466
摘要： The present invention provides a device that measures at least one property of the liquid or gas, where the invention is a CMUT sensor that includes a substrate, a first layer disposed on the substrate, where the first layer includes a cavity, and a compound plate, where the compound plated includes a bottom plate, an intermediate plate and a top plate. According to the invention, the intermediate plate has at least one sample inlet, a sample cavity and at least one sample outlet, where the bottom plate is disposed on the first layer, and the cavity in the first layer is sealed by the compound plate. The cavity in the first layer can be a vacuum or contain a gas. The CMUT sensor can be disposed in an array of two or more sensors and connected electrically in parallel.
摘要翻译： 本发明提供了一种测量液体或气体的至少一种性能的装置，其中本发明是包括基板的CMUT传感器，设置在基板上的第一层，其中第一层包括空腔，复合板 ，其中复合镀层包括底板，中间板和顶板。 根据本发明，中间板具有至少一个样品入口，样品腔和至少一个样品出口，其中底板设置在第一层上，并且第一层中的空腔被复合板密封。 第一层中的空腔可以是真空或含有气体。 CMUT传感器可以设置在两个或更多个传感器的阵列中，并联电连接。
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