公开(公告)号：US09461148B2

公开(公告)日：2016-10-04

申请号：US13799291

申请日：2013-03-13

申请人： Jae-Young Park ,  Ji-Hoon Cha ,  Jae-Jik Baek ,  Bon-Young Koo ,  Kang-Hun Moon ,  Bo-Un Yoon

发明人： Jae-Young Park ,  Ji-Hoon Cha ,  Jae-Jik Baek ,  Bon-Young Koo ,  Kang-Hun Moon ,  Bo-Un Yoon

IPC分类号： H01L21/8234 ,  H01L29/66

CPC分类号： H01L29/66795

摘要： A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one side of the respective gate electrodes; forming an oxide layer on the surfaces of the first recesses; and expanding the first recesses into second recesses by removing the oxide layer. Related devices are also disclosed.

摘要翻译： 描述制造半导体器件的方法。 制造半导体器件的方法包括提供形成为从基板突出的翅片和形成在鳍片上的与栅极相交的多个栅电极; 在所述翅片的至少一个侧面上形成第一凹部; 在所述第一凹部的表面上形成氧化物层; 并且通过去除氧化物层将第一凹槽膨胀成第二凹陷。 还公开了相关设备。

公开(公告)号：US20140220752A1

公开(公告)日：2014-08-07

申请号：US13799291

申请日：2013-03-13

申请人： Jae-Young PARK ,  Ji-Hoon Cha ,  Jae-Jik Baek ,  Bon-Young Koo ,  Kang-Hun Moon ,  Bo-un Yoon

发明人： Jae-Young PARK ,  Ji-Hoon Cha ,  Jae-Jik Baek ,  Bon-Young Koo ,  Kang-Hun Moon ,  Bo-un Yoon

IPC分类号： H01L29/66

CPC分类号： H01L29/66795

摘要： A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one side of the respective gate electrodes; forming an oxide layer on the surfaces of the first recesses; and expanding the first recesses into second recesses by removing the oxide layer. Related devices are also disclosed.

摘要翻译： 描述制造半导体器件的方法。 制造半导体器件的方法包括提供形成为从基板突出的翅片和形成在鳍片上的与栅极相交的多个栅电极; 在所述翅片的至少一个侧面上形成第一凹部; 在所述第一凹部的表面上形成氧化物层; 并且通过去除氧化物层将第一凹槽膨胀成第二凹陷。 还公开了相关设备。

公开(公告)号：US20120299154A1

公开(公告)日：2012-11-29

申请号：US13459740

申请日：2012-04-30

申请人： Hyun-Jun Sim ,  Jae-Young Park ,  Hyun-Seung Kim ,  Sang-Bom Kang ,  Sun-Ghil Lee ,  Hyun-Deok Yang ,  Kang-Hun Moon ,  Han-Ki Lee ,  Sang-Mi Choi

发明人： Hyun-Jun Sim ,  Jae-Young Park ,  Hyun-Seung Kim ,  Sang-Bom Kang ,  Sun-Ghil Lee ,  Hyun-Deok Yang ,  Kang-Hun Moon ,  Han-Ki Lee ,  Sang-Mi Choi

IPC分类号： H01L29/00 ,  H01L21/336 ,  H01L21/04

CPC分类号： H01L29/6659 ,  H01L21/28185 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： A semiconductor device having an improved negative bias temperature instability lifetime characteristic is manufactured by forming a first insulating layer on a substrate, performing a first nitridation on the first insulating layer to form a second insulating layer, and sequentially performing a first and second anneal on the second insulating layer to form a third insulating layer, wherein the second anneal is performed at a higher temperature and with a different gas than the first anneal. A second nitridation is performed on the third insulating layer to form a fourth insulating layer, and a sequential third and fourth anneal on the fourth insulating layer forms a fifth insulating layer. The third anneal is performed at a higher temperature than the first anneal, and the fourth anneal is performed at a higher temperature than the second anneal and with a different gas than the third anneal.

摘要翻译： 通过在基板上形成第一绝缘层，在第一绝缘层上进行第一次氮化，形成第二绝缘层，依次进行第一和第二退火，制造具有改善的负偏压温度不稳定寿命特性的半导体器件 第二绝缘层以形成第三绝缘层，其中所述第二退火在比所述第一退火更高的温度和不同的气体下进行。 在第三绝缘层上进行第二次氮化，以形成第四绝缘层，并且在第四绝缘层上顺序的第三和第四退火形成第五绝缘层。 第三退火在比第一退火更高的温度下进行，第四退火在比第二退火更高的温度下进行，并且具有比第三退火不同的气体。

公开(公告)号：US08759182B2

公开(公告)日：2014-06-24

申请号：US13459740

申请日：2012-04-30

申请人： Hyun-Jun Sim ,  Jae-Young Park ,  Hyun-Seung Kim ,  Sang-Bom Kang ,  Sun-Ghil Lee ,  Hyun-Deok Yang ,  Kang-Hun Moon ,  Han-Ki Lee ,  Sang-Mi Choi

发明人： Hyun-Jun Sim ,  Jae-Young Park ,  Hyun-Seung Kim ,  Sang-Bom Kang ,  Sun-Ghil Lee ,  Hyun-Deok Yang ,  Kang-Hun Moon ,  Han-Ki Lee ,  Sang-Mi Choi

IPC分类号： H01L21/336

CPC分类号： H01L29/6659 ,  H01L21/28185 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： A semiconductor device having an improved negative bias temperature instability lifetime characteristic is manufactured by forming a first insulating layer on a substrate, performing a first nitridation on the first insulating layer to form a second insulating layer, and sequentially performing a first and second anneal on the second insulating layer to form a third insulating layer, wherein the second anneal is performed at a higher temperature and with a different gas than the first anneal. A second nitridation is performed on the third insulating layer to form a fourth insulating layer, and a sequential third and fourth anneal on the fourth insulating layer forms a fifth insulating layer. The third anneal is performed at a higher temperature than the first anneal, and the fourth anneal is performed at a higher temperature than the second anneal and with a different gas than the third anneal.

摘要翻译： 通过在基板上形成第一绝缘层，在第一绝缘层上进行第一次氮化，形成第二绝缘层，依次进行第一和第二退火，制造具有改善的负偏压温度不稳定寿命特性的半导体器件 第二绝缘层以形成第三绝缘层，其中所述第二退火在比所述第一退火更高的温度和不同的气体下进行。 在第三绝缘层上进行第二次氮化，以形成第四绝缘层，并且在第四绝缘层上顺序的第三和第四退火形成第五绝缘层。 第三退火在比第一退火更高的温度下进行，第四退火在比第二退火更高的温度下进行，并且具有比第三退火不同的气体。

公开(公告)号：US20120142159A1

公开(公告)日：2012-06-07

申请号：US13242302

申请日：2011-09-23

申请人： Tae-Gon Kim ,  Sang-Bom Kang ,  Jae-Young Park ,  Kang-Hun Moon ,  Hyun-Jun Sim ,  Seung-Hun Lee ,  Han-Ki Lee ,  Hyun-Seung Kim

发明人： Tae-Gon Kim ,  Sang-Bom Kang ,  Jae-Young Park ,  Kang-Hun Moon ,  Hyun-Jun Sim ,  Seung-Hun Lee ,  Han-Ki Lee ,  Hyun-Seung Kim

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L21/26586 ,  H01L21/2257 ,  H01L21/26513 ,  H01L29/6659 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

摘要： Methods for fabricating a semiconductor device are provided wherein, in an embodiment, the method includes the steps of forming a gate electrode on a semiconductor substrate, forming a trench by recessing the semiconductor substrate in the vicinity of the gate electrode, doping an anti-diffusion ion into a portion of the semiconductor substrate in the trench, and growing an impurity-doped epitaxial layer on the semiconductor substrate doped with the anti-diffusion ion.

摘要翻译： 提供了制造半导体器件的方法，其中在一个实施例中，该方法包括以下步骤：在半导体衬底上形成栅电极，通过在栅极附近凹入半导体衬底形成沟槽，掺杂抗扩散 离子进入沟槽中的半导体衬底的一部分，并且在掺杂有抗扩散离子的半导体衬底上生长杂质掺杂的外延层。