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    Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and MIM capacitors so formed
    1.
    发明申请
    Methods of forming metal-insulator-metal (MIM) capacitors with separate seed and main dielectric layers and MIM capacitors so formed 有权
    形成金属 - 绝缘体 - 金属（MIM）电容器的方法，该电容器具有单独的种子和主电介质层以及如此形成的MIM电容器

    公开(公告)号：US20050227432A1

    公开(公告)日：2005-10-13

    申请号：US11097404

    申请日：2005-04-01

    申请人： Jae-hyoung Choi ,  Sung-tae Kim ,  Ki-chul Kim ,  Cha-young Yoo ,  Jeong-hee Chung ,  Se-hoon Oh ,  Jeong-sik Choi

    发明人： Jae-hyoung Choi ,  Sung-tae Kim ,  Ki-chul Kim ,  Cha-young Yoo ,  Jeong-hee Chung ,  Se-hoon Oh ,  Jeong-sik Choi

    IPC分类号： H01L27/108 ,  H01L21/311 ,  H01L21/8242

    CPC分类号： H01L21/31122

    摘要： A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a meta-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

    摘要翻译： 可以在间绝缘子金属（MIM）型电容器的金属氮化物下电极上形成金属 - 氮氧化物种子电介质层。 金属 - 氮化物种子电介质层可以用作阻挡层，以在例如用于在包括MIM型的集成电路中形成上层金属化/结构的后端处理中减少与金属氮化物下电极的反应 电容器。 包含在金属 - 氮氧化物种子电介质层中的氮可以减少在常规型MIM电容器中可能发生的反应类型。 可以在金属 - 氮化物种子介电层上形成金属氧化物主介电层，并且可以与MIM型电容器中的金属 - 氮化物种子电介质层保持分离。 金属氧化物主电介质层可以被稳定（使用例如热或等离子体处理）以从其中去除缺陷（例如碳）并调整金属氧化物主介电层的化学计量。

    Methods of forming metal-insulator-metal (MIM) capacitors with separate seed
    2.
    发明授权
    Methods of forming metal-insulator-metal (MIM) capacitors with separate seed 有权
    用分离的种子形成金属 - 绝缘体 - 金属（MIM）电容器的方法

    公开(公告)号：US07314806B2

    公开(公告)日：2008-01-01

    申请号：US11097404

    申请日：2005-04-01

    申请人： Jae-hyoung Choi ,  Sung-tae Kim ,  Ki-chul Kim ,  Cha-young Yoo ,  Jeong-hee Chung ,  Se-hoon Oh ,  Jeong-sik Choi

    发明人： Jae-hyoung Choi ,  Sung-tae Kim ,  Ki-chul Kim ,  Cha-young Yoo ,  Jeong-hee Chung ,  Se-hoon Oh ,  Jeong-sik Choi

    IPC分类号： H01L21/20

    CPC分类号： H01L21/31122

    摘要： A metal-oxy-nitride seed dielectric layer can be formed on a metal-nitride lower electrode of a metal-insulator-metal (MIM) type capacitor. The metal-oxy-nitride seed dielectric layer can act as a barrier layer to reduce a reaction with the metal-nitride lower electrode during, for example, backend processing used to form upper levels of metallization/structures in an integrated circuit including the MIM type capacitor. Nitrogen included in the metal-oxy-nitride seed dielectric layer can reduce the type of reaction, which may occur in conventional type MIM capacitors. A metal-oxide main dielectric layer can be formed on the metal-oxy-nitride seed dielectric layer and can remain separate from the metal-oxy-nitride seed dielectric layer in the MIM type capacitor. The metal-oxide main dielectric layer can be stabilized (using, for example, a thermal or plasma treatment) to remove defects (such as carbon) therefrom and to adjust the stoichiometry of the metal-oxide main dielectric layer.

    摘要翻译： 可以在金属 - 绝缘体 - 金属（MIM）型电容器的金属氮化物下电极上形成金属 - 氮化物种子电介质层。 金属 - 氮化物种子电介质层可以用作阻挡层，以在例如用于在包括MIM型的集成电路中形成上层金属化/结构的后端处理中减少与金属氮化物下电极的反应 电容器。 包含在金属 - 氮氧化物种子电介质层中的氮可以减少在常规型MIM电容器中可能发生的反应类型。 可以在金属 - 氮化物种子介电层上形成金属氧化物主介电层，并且可以与MIM型电容器中的金属 - 氮化物种子电介质层保持分离。 金属氧化物主电介质层可以被稳定（使用例如热或等离子体处理）以从其中去除缺陷（例如碳）并调整金属氧化物主介电层的化学计量。

    Semiconductor Device and Method of Fabricating the Same
    7.
    发明申请
    Semiconductor Device and Method of Fabricating the Same 审中-公开
    半导体器件及其制造方法

    公开(公告)号：US20090309187A1

    公开(公告)日：2009-12-17

    申请号：US12544500

    申请日：2009-08-20

    申请人： Jae-hyoung Choi ,  Cha-young Yoo ,  Jong-cheol Lee ,  Kyoung-ryul Yoon ,  Ki-vin Im ,  Hoon-sang Choi ,  Se-hoon Oh ,  Se-hwi Cho

    发明人： Jae-hyoung Choi ,  Cha-young Yoo ,  Jong-cheol Lee ,  Kyoung-ryul Yoon ,  Ki-vin Im ,  Hoon-sang Choi ,  Se-hoon Oh ,  Se-hwi Cho

    IPC分类号： H01L29/92 ,  H01G4/06

    CPC分类号： H01L28/40 ,  H01L27/10852 ,  H01L28/91

    摘要： Provided is a semiconductor device including a multi-layer dielectric structure and a method of fabricating the semiconductor device. According to one example embodiment, the semiconductor device includes a capacitor comprising: first and second electrodes facing each other; at least one first dielectric layer that is disposed between the first and second electrodes, the at least one first dielectric layer comprising a first high-k dielectric layer doped with silicon; and at least one second dielectric layer that is disposed between the at least one first dielectric layer and any of the first and second electrodes, the at least one second dielectric layer having a higher crystallization temperature than that of the first dielectric layer.

    摘要翻译： 提供了包括多层电介质结构的半导体器件和制造该半导体器件的方法。 根据一个示例性实施例，半导体器件包括电容器，包括：彼此面对的第一和第二电极; 设置在所述第一和第二电极之间的至少一个第一介电层，所述至少一个第一介电层包括掺杂有硅的第一高k电介质层; 以及设置在所述至少一个第一介电层和所述第一和第二电极中的任一个之间的至少一个第二电介质层，所述至少一个第二电介质层具有比所述第一介电层的结晶温度更高的结晶温度。

    Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same
    8.
    发明授权
    Integrated circuit capacitors having composite dielectric layers therein containing crystallization inhibiting regions and methods of forming same 有权
    集成电路电容器，其中包含结晶抑制区域的复合电介质层及其形成方法

    公开(公告)号：US08344439B2

    公开(公告)日：2013-01-01

    申请号：US13171163

    申请日：2011-06-28

    申请人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    发明人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    IPC分类号： H01L29/94

    CPC分类号： H01L29/92 ,  H01L27/10852 ,  H01L28/40

    摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

    摘要翻译： 集成电路电容器在其中具有复合电介质层。 这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。 集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。 电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。 电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

    Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same
    9.
    发明申请
    Integrated Circuit Capacitors Having Composite Dielectric Layers Therein Containing Crystallization Inhibiting Regions and Methods of Forming Same 有权
    具有复合介质层的集成电路电容器，其中包含结晶抑制区域和形成方法

    公开(公告)号：US20100187655A1

    公开(公告)日：2010-07-29

    申请号：US12754713

    申请日：2010-04-06

    申请人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    发明人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    IPC分类号： H01L29/92

    CPC分类号： H01L29/92 ,  H01L27/10852 ,  H01L28/40

    摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

    摘要翻译： 集成电路电容器在其中具有复合电介质层。 这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。 集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。 电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。 电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。

    Capacitors having composite dielectric layers containing crystallization inhibiting regions
    10.
    发明授权
    Capacitors having composite dielectric layers containing crystallization inhibiting regions 有权
    具有包含结晶抑制区域的复合电介质层的电容器

    公开(公告)号：US07973352B2

    公开(公告)日：2011-07-05

    申请号：US12754713

    申请日：2010-04-06

    申请人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    发明人： Jae-hyoung Choi ,  Jung-hee Chung ,  Cha-young Yoo ,  Young-sun Kim ,  Se-hoon Oh

    IPC分类号： H01L29/94

    CPC分类号： H01L29/92 ,  H01L27/10852 ,  H01L28/40

    摘要： Integrated circuit capacitors have composite dielectric layers therein. These composite dielectric layers include crystallization inhibiting regions that operate to increase the overall crystallization temperature of the composite dielectric layer. An integrated circuit capacitor includes first and second capacitor electrodes and a capacitor dielectric layer extending between the first and second capacitor electrodes. The capacitor dielectric layer includes a composite of a first dielectric layer extending adjacent the first capacitor electrode, a second dielectric layer extending adjacent the second capacitor electrode and an electrically insulating crystallization inhibiting layer extending between the first and second dielectric layers. The electrically insulating crystallization inhibiting layer is formed of a material having a higher crystallization temperature characteristic relative to the first and second dielectric layers.

    摘要翻译： 集成电路电容器在其中具有复合电介质层。 这些复合电介质层包括用于增加复合介电层的整体结晶温度的结晶抑制区。 集成电路电容器包括第一和第二电容器电极和在第一和第二电容器电极之间延伸的电容器介电层。 电容器介电层包括邻近第一电容器电极延伸的第一电介质层，邻近第二电容器电极延伸的第二电介质层和在第一和第二电介质层之间延伸的电绝缘的结晶抑制层的复合材料。 电绝缘结晶抑制层由相对于第一和第二介电层具有较高结晶温度特性的材料形成。