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公开(公告)号:US5091047A
公开(公告)日:1992-02-25
申请号:US733473
申请日:1991-07-22
IPC分类号: H01L21/027 , H01L21/311 , H01L21/3213
CPC分类号: H01L21/32134 , H01L21/0277 , H01L21/31116 , H01L21/31144 , H01L21/32136 , Y10S438/945
摘要: A bilayer mask is utilized for etching a primary layer, which may be either an aluminum metallization layer or a dielectric layer. The bilayer mask includes both a thin resist layer and a metal imaging layer. The thin resist layer provides for high resolution patterning of the metal imaging layer. The metal imaging layer, in turn, provides for durability to withstand subsequent plasma etching of the underlying primary layer.
摘要翻译: 使用双层掩模来蚀刻初级层,其可以是铝金属化层或电介质层。 双层掩模包括薄的抗蚀剂层和金属成像层。 薄的抗蚀剂层提供金属成像层的高分辨率图案化。 金属成像层又提供耐久性以承受下一层等离子体蚀刻。
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公开(公告)号:US5045150A
公开(公告)日:1991-09-03
申请号:US210211
申请日:1988-06-17
IPC分类号: H01L21/027 , H01L21/311 , H01L21/3213
CPC分类号: H01L21/31144 , H01L21/0277 , H01L21/31116 , H01L21/32134 , H01L21/32136
摘要: A bilayer mask is utilized for etching a primary layer, which may be either an aluminum metallization layer or a dielectric layer. The bilayer mask includes both a thin resist layer and a metal imaging layer. The thin resist layer provides for high resolution patterning of the metal imaging layer. The metal imaging layer, in turn, provides for durability to withstand subsequent plasma etching of the underlying primary layer.
摘要翻译: 使用双层掩模来蚀刻初级层,其可以是铝金属化层或电介质层。 双层掩模包括薄的抗蚀剂层和金属成像层。 薄的抗蚀剂层提供金属成像层的高分辨率图案化。 金属成像层又提供耐久性以承受下一层等离子体蚀刻。
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公开(公告)号:US4883772A
公开(公告)日:1989-11-28
申请号:US241784
申请日:1988-09-06
申请人: James M. Cleeves , James G. Heard
发明人: James M. Cleeves , James G. Heard
IPC分类号: H01L21/285 , H01L29/10 , H01L29/423 , H01L29/45
CPC分类号: H01L29/1004 , H01L21/28518 , H01L29/42304 , H01L29/456 , Y10S148/019 , Y10S148/105
摘要: A silicide base shunt 50 and method of fabricating it are disclosed for a bipolar transistor. The base shunt 50 is fabricated using the first layer metal 36, 39 as a mask to etch silicon dioxide 27 surrounding the emitter 34 to thereby expose the underlying silicon epitaxial layer 24. Nickel or copper are then deposited onto the silicon 24 to form a region of silicide 50 extending from a base contact 36 to closely proximate the emitter 34, thereby minimizing the resistance of the extrinsic base region 24 of the transistor.
摘要翻译: 公开了一种用于双极晶体管的硅化物基极分路器50及其制造方法。 使用第一层金属36,39作为掩模来制造基极分路器50,以蚀刻围绕发射极34的二氧化硅27,从而暴露下面的硅外延层24.然后将镍或铜沉积到硅24上以形成区域 的硅化物50从基极触点36延伸到靠近发射极34的位置,由此最小化晶体管的外部基极区域24的电阻。
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