Method for sharing interfaces among multiple domain environments with enhanced hooks for exclusiveness
    3.
    发明授权
    Method for sharing interfaces among multiple domain environments with enhanced hooks for exclusiveness 有权
    在多个域环境之间共享接口的方法,具有增强的钩子以进行排他性

    公开(公告)号:US08762595B1

    公开(公告)日:2014-06-24

    申请号:US11098726

    申请日:2005-04-05

    IPC分类号: G06F13/14

    CPC分类号: G06F13/385

    摘要: A method for sharing a network interface among multiple hosts and includes providing a network interface, associating a first set of the plurality of memory access channels with a first host, and associating a second set of the plurality of memory access channels with a second host is disclosed. The network interface including a plurality of memory access channels.

    摘要翻译: 一种用于在多个主机之间共享网络接口的方法,包括提供网络接口,将第一组多个存储器访问信道与第一主机相关联,以及将第二组多个存储器访问通道与第二主机相关联的方法是 披露 网络接口包括多个存储器访问信道。

    Method for resolving mutex contention in a network system
    4.
    发明授权
    Method for resolving mutex contention in a network system 有权
    解决网络系统中互斥竞争的方法

    公开(公告)号:US08023528B2

    公开(公告)日:2011-09-20

    申请号:US12691435

    申请日:2010-01-21

    IPC分类号: H04L12/66

    CPC分类号: G06F15/17375

    摘要: A method of resolving mutex contention within a network interface unit which includes providing a plurality of memory access channels, and moving a thread via at least one of the plurality of memory access channels, the plurality of memory access channels allowing moving of the thread while avoiding mutex contention when moving the thread via the at least one of the plurality of memory access channels is disclosed.

    摘要翻译: 一种解决网络接口单元内的互斥竞争的方法,其包括提供多个存储器访问通道,以及经由所述多个存储器访问通道中的至少一个移动线程,所述多个存储器访问通道允许线程移动同时避免 公开了当通过多个存储器访问信道中的至少一个移动线程时的互斥争用。

    Hiding system latencies in a throughput networking systems
    5.
    发明授权
    Hiding system latencies in a throughput networking systems 有权
    在吞吐量网络系统中隐藏系统延迟

    公开(公告)号:US08006016B2

    公开(公告)日:2011-08-23

    申请号:US13008092

    申请日:2011-01-18

    IPC分类号: G06F12/00

    摘要: A method for addressing system latency within a network system which includes providing a network interface and moving data within each of the plurality of memory access channels independently and in parallel to and from a memory system so that one or more of the plurality of memory access channels operate efficiently in the presence of arbitrary memory latencies across multiple requests is disclosed. The network interface includes a plurality of memory access channels.

    摘要翻译: 一种用于解决网络系统内的系统等待时间的方法,包括提供网络接口并且在存储器系统中独立地并且与存储器系统并行地移动多个存储器访问通道的每一个内的数据,使得多个存储器访问通道 公开了在多个请求之间存在任意存储器延迟的情况下有效地操作。 网络接口包括多个存储器访问通道。

    Network system including packet classification for partitioned resources
    6.
    发明授权
    Network system including packet classification for partitioned resources 有权
    网络系统包括分区资源的分组分类

    公开(公告)号:US07567567B2

    公开(公告)日:2009-07-28

    申请号:US11098310

    申请日:2005-04-05

    IPC分类号: H04L12/28

    摘要: A network system which includes a plurality of processing entities, an interconnect device coupled to the plurality of processing entities, a memory system coupled to the interconnect device and the plurality of processing entities, a network interface unit coupled to the plurality of processing entities and the memory system via the interconnect device. The network interface includes a memory access module and a packet classifier. The memory access module includes a plurality of parallel memory access channels. The packet classifier provides a flexible association between packets and the plurality of processing entities via the plurality of memory access channels.

    摘要翻译: 一种网络系统,其包括多个处理实体,耦合到所述多个处理实体的互连设备,耦合到所述互连设备和所述多个处理实体的存储器系统,耦合到所述多个处理实体的网络接口单元和 内存系统通过互连设备。 网络接口包括存储器访问模块和分组分类器。 存储器访问模块包括多个并行存储器存取通道。 分组分类器通过多个存储器访问信道提供分组与多个处理实体之间的灵活关联。

    Reorder mechanism for use in a relaxed order input/output system
    7.
    发明授权
    Reorder mechanism for use in a relaxed order input/output system 有权
    在轻松的订单输入/输出系统中使用的重新排序机制

    公开(公告)号:US07529245B1

    公开(公告)日:2009-05-05

    申请号:US11098710

    申请日:2005-04-04

    IPC分类号: H04L12/28

    摘要: A reorder mechanism for use with a relaxed order interconnect device. The reorder mechanism includes a buffer module and a reorder module coupled to the buffer module is disclosed. The reorder module enables movement of multiple packets between a plurality of resources. The movement of multiple packets of information has a relaxed ordering of data transfers associated with multiple packets and also a relaxed ordering of data transfers associated with any single packet.

    摘要翻译: 用于轻松订单互连设备的重新排序机制。 重新排序机制包括缓冲模块和耦合到缓冲模块的重新排序模块。 重新排序模块使得能够在多个资源之间移动多个分组。 多个信息分组的移动具有与多个分组相关联的数据传输的放松顺序,以及与任何单个分组相关联的数据传输的轻松排序。