公开(公告)号：US20220310847A1

公开(公告)日：2022-09-29

申请号：US17655099

申请日：2022-03-16

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI

IPC: H01L29/786 ,  H01L29/40

Abstract: A display device including a plurality of thin film transistors. One of the plurality of thin film transistors includes a gate electrode, a semiconductor layer having a region overlapping the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, a source electrode and a drain electrode in contact with a surface of the semiconductor layer opposite to the side of the gate insulating layer, and a first shield electrode arranged in a region where the source electrode and the gate electrode overlap, and a second shield electrode arranged in a region where the drain electrode and the gate electrode overlap. The first shield electrode and the second shield electrode are arranged between the gate electrode and the semiconductor layer, and are insulated from the gate electrode, the semiconductor layer, the source electrode, and the drain electrode.

公开(公告)号：US20210151576A1

公开(公告)日：2021-05-20

申请号：US17162367

申请日：2021-01-29

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI ,  Tatsuya TODA ,  Masashi TSUBUKU

IPC: H01L29/45 ,  H01L29/24 ,  H01L29/786 ,  H01L21/02 ,  H01L21/443 ,  H01L21/4763 ,  H01L29/66

Abstract: A thin film transistor comprising an active layer made of an oxide semiconductor containing indium and gallium, an electrode layer including a titanium layer formed on the active layer, wherein an indium concentration is equal to or less than 1.3 times an oxygen concentration in a range of 15 nm from an interface between the active layer and the electrode layer toward the active layer.

公开(公告)号：US20220190163A1

公开(公告)日：2022-06-16

申请号：US17549867

申请日：2021-12-14

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI ,  Masashi TSUBUKU

IPC: H01L29/786

Abstract: According to one embodiment, a semiconductor device includes a first insulating layer, an oxide semiconductor disposed on the first insulating layer, a second insulating layer which covers the oxide semiconductor and a gate electrode disposed on the second insulating layer and overlapping the oxide semiconductor. The oxide semiconductor includes a first region overlapping the gate electrode and a second region not overlapping the gate electrode. The first insulating layer, the second region and the second insulating layer contain impurities of a same type. The impurities contained in a region directly below the second region in the first insulating layer are more than the impurities contained in the second region.

公开(公告)号：US20200227569A1

公开(公告)日：2020-07-16

申请号：US16831958

申请日：2020-03-27

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI ,  Yuichiro HANYU ,  Masahiro WATABE

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/02 ,  H01L21/383 ,  H01L21/385 ,  H01L21/428 ,  H01L29/423

Abstract: The purpose of the invention is to form the TFT of the oxide semiconductor, in which influence of variation in mask alignment is suppressed, thus, manufacturing a display device having a TFT of stable characteristics. The concrete measure is as follows. A display device including plural pixels, each of the plural pixels having a thin film transistor (TFT) of an oxide semiconductor comprising: a width of the oxide semiconductor in the channel width direction is wider than a width of the gate electrode in the channel width direction.

公开(公告)号：US20160131955A1

公开(公告)日：2016-05-12

申请号：US14930261

申请日：2015-11-02

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI

IPC: G02F1/1362 ,  G02F1/1368 ,  G02F1/1333 ,  G02F1/1335

CPC classification number: G02F1/133553 ,  G02B6/00 ,  G02F1/134363 ,  G02F1/1362

Abstract: A provided is a liquid crystal display device for reducing power consumption by increasing efficiency of a backlight. The liquid crystal display includes, on a TFT substrate, a semiconductor layer and a gate electrode are laminated via a gate insulating film. A TFT is formed by the semiconductor layer and the gate electrode. A base film is formed of an insulating film and at a lower layer of the semiconductor layer. As seen in plan view, a reflection film is formed on a lower side of the base film at an area corresponding to the TFT. The reflection film is independently formed for each of the TFTs. Each of the reflection films is electrically floating. The reflection film has a reflectance of 70% or more at a lower side thereof. The use efficiency of the light from a backlight can be increased because of the existence of the reflection film.

Abstract translation: 提供了一种通过提高背光源的效率来降低功耗的液晶显示装置。 液晶显示器在TFT基板上包括通过栅极绝缘膜层压半导体层和栅电极。 TFT由半导体层和栅电极形成。 基膜由绝缘膜和半导体层的下层形成。 如平面图所示，在与TFT对应的区域的基底膜的下侧形成有反射膜。 每个TFT独立地形成反射膜。 每个反射膜都是电浮动的。 反射膜的下侧的反射率为70％以上。 由于反射膜的存在，可以提高来自背光源的光的使用效率。

公开(公告)号：US20240248361A1

公开(公告)日：2024-07-25

申请号：US18594462

申请日：2024-03-04

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Takeshi SAKAI ,  Tatsuya TODA

IPC: G02F1/1368 ,  H10K59/12 ,  H10K59/124 ,  H10K71/00

CPC classification number: G02F1/1368 ,  H10K59/124 ,  H10K71/00 ,  H10K59/1201

Abstract: A display device comprising a transistor and a display element over the transistor, wherein the transistor includes a gate electrode on an insulating surface, a gate insulating layer on the gate electrode, and source/drain electrodes on the oxide semiconductor layer and the gate insulating layer, each including a first conductive layer containing nitrogen and a second conductive layer on the first conductive layer, and an insulating layer contains oxygen on the oxide semiconductor layer and the source/drain electrodes.

公开(公告)号：US20230058988A1

公开(公告)日：2023-02-23

申请号：US17891162

申请日：2022-08-19

Applicant: Japan Display Inc.

Inventor： Akihiro HANADA ,  Hajime WATAKABE ,  Takeshi SAKAI

IPC: H01L29/786 ,  H01L29/10 ,  H01L29/423 ,  H01L29/417

Abstract: According to one embodiment, a transistor includes a gate electrode, an oxide semiconductor layer which overlaps the gate electrode and including a central portion and an end portion, and a source electrode and a drain electrode each connected to the oxide semiconductor layer, wherein an oxidation degree of the end portion is lower than an oxidation degree of the central portion, and a length of the gate electrode overlapping the central portion is greater than a length of the gate electrode overlapping the end portion.

公开(公告)号：US20210366945A1

公开(公告)日：2021-11-25

申请号：US17397251

申请日：2021-08-09

Applicant: Japan Display Inc.

Inventor： Takeshi SAKAI

IPC: H01L27/12 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: A semiconductor device includes a first circuit element, the first circuit element including: a first semiconductor layer having a concave part; a first insulating layer arranged above the first semiconductor layer, the first insulating layer having a first through hole in a region overlapping with the concave part. A method of manufacturing a semiconductor device, the method including: forming a first semiconductor layer having a concave part on a substrate; forming a first insulating layer on the first semiconductor layer; forming a first through hole in a region of the first insulating layer overlapping with the concave part; and forming a first conductive layer arranged in the concave part and the first through hole.

公开(公告)号：US20220190164A1

公开(公告)日：2022-06-16

申请号：US17549882

申请日：2021-12-14

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Kentaro MIURA ,  Toshinari SASAKI ,  Takeshi SAKAI ,  Akihiro HANADA ,  Masashi TSUBUKU

IPC: H01L29/786 ,  H01L29/423

Abstract: According to one embodiment, a semiconductor device includes an oxide semiconductor. The oxide semiconductor includes a first edge portion and a second edge portion intersecting a gate electrode, a first area overlapping the gate electrode, a second area along the first edge portion, a third area along the second edge portion, a fourth area the first edge portion, a fifth area along the second edge portion, a sixth area surrounded by the first area, the second area and the third area, and a seventh area surrounded by the first area, the fourth area and the fifth area. The first area, the second area and the third area, the fourth area and the fifth area have a higher resistivity than those of the sixth area and the seventh area.

公开(公告)号：US20220004039A1

公开(公告)日：2022-01-06

申请号：US17447740

申请日：2021-09-15

Applicant: Japan Display Inc.

Inventor： Masashi TSUBUKU ,  Takeshi SAKAI ,  Tatsuya TODA

IPC: G02F1/1368 ,  H01L27/32 ,  H01L51/56

Abstract: A display device comprising a transistor and a display element over the transistor, wherein the transistor includes a gate electrode on an insulating surface, a gate insulating layer on the gate electrode, and source/drain electrodes on the oxide semiconductor layer and the gate insulating layer, each including a first conductive layer containing nitrogen and a second conductive layer on the first conductive layer, and an insulating layer contains oxygen on the oxide semiconductor layer and the source/drain electrodes.