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1.发明申请公开(公告)号：US20110316058A1
公开(公告)日：2011-12-29
申请号：US12823728
申请日：2010-06-25
申请人： Jeffrey P. GAMBINO , Matthew D. MOON , William J. MURPHY , James S. NAKOS , Paul W. PASTEL , Brett A. PHILIPS
发明人： Jeffrey P. GAMBINO , Matthew D. MOON , William J. MURPHY , James S. NAKOS , Paul W. PASTEL , Brett A. PHILIPS
IPC分类号： H01L27/115 , G06F17/50 , H01L21/8246
CPC分类号： H01L28/55 , H01L27/11507
摘要： Ferro-electric capacitor modules, methods of manufacture and design structures. The method of manufacturing the ferro-electric capacitor includes forming a barrier layer on an insulator layer of a CMOS structure. The method further includes forming a top plate and a bottom plate over the barrier layer. The method further includes forming a ferro-electric material between the top plate and the bottom plate. The method further includes encapsulating the barrier layer, top plate, bottom plate and ferro-electric material with an encapsulating material. The method further includes forming contacts to the top plate and bottom plate, through the encapsulating material. At least the contact to the top plate and a contact to a diffusion of the CMOS structure are in electrical connection through a common wire.
摘要翻译： 铁电电容器模块，制造方法和设计结构。 制造铁电电容器的方法包括在CMOS结构的绝缘体层上形成阻挡层。 该方法还包括在阻挡层上形成顶板和底板。 该方法还包括在顶板和底板之间形成铁电材料。 该方法还包括用封装材料封装阻挡层，顶板，底板和铁电材料。 该方法还包括通过封装材料形成与顶板和底板的接触。 至少与顶板的接触和与CMOS结构的扩散的接触通过公共导线电连接。
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公开(公告)号：US20100187614A1
公开(公告)日：2010-07-29
申请号：US12752628
申请日：2010-04-01
IPC分类号： H01L27/092
CPC分类号： H01L21/823857
摘要： A method of fabricating a semiconductor structure. The method includes forming a first feature of a first active device and a second feature of a second active device, introducing a first amount of nitrogen into the first feature of the first active device, and introducing a second amount of nitrogen into the second feature of the second active device, the second amount of nitrogen being different from the first amount of nitrogen.
摘要翻译： 一种制造半导体结构的方法。 该方法包括形成第一有源器件的第一特征和第二有源器件的第二特征，将第一量的氮引入第一有源器件的第一特征中，并将第二量的氮引入到第二有源器件的第二特征中 第二活性装置，第二氮量不同于第一氮量。
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公开(公告)号：US20120104551A1
公开(公告)日：2012-05-03
申请号：US13349158
申请日：2012-01-12
IPC分类号： H01L29/92
CPC分类号： H01L28/91
摘要： Trench capacitors and methods of manufacturing the trench capacitors are provided. The trench capacitors are very dense series capacitor structures with independent electrode contacts. In the method, a series of capacitors are formed by forming a plurality of insulator layers and a plurality of electrodes in a trench structure, where each electrode is formed in an alternating manner with each insulator layer. The method further includes planarizing the electrodes to form contact regions for a plurality of capacitors.
摘要翻译： 提供了沟槽电容器和制造沟槽电容器的方法。 沟槽电容器是具有独立电极触点的非常密集的串联电容器结构。 在该方法中，通过在沟槽结构中形成多个绝缘体层和多个电极而形成一系列电容器，其中每个电极与每个绝缘体层交替地形成。 该方法还包括平面化电极以形成多个电容器的接触区域。
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公开(公告)号：US20110084360A1
公开(公告)日：2011-04-14
申请号：US12575989
申请日：2009-10-08
CPC分类号： H01L28/91
摘要： Trench capacitors and methods of manufacturing the trench capacitors are provided. The trench capacitors are very dense series capacitor structures with independent electrode contacts. In the method, a series of capacitors are formed by forming a plurality of insulator layers and a plurality of electrodes in a trench structure, where each electrode is formed in an alternating manner with each insulator layer. The method further includes planarizing the electrodes to form contact regions for a plurality of capacitors.
摘要翻译： 提供了沟槽电容器和制造沟槽电容器的方法。 沟槽电容器是具有独立电极触点的非常密集的串联电容器结构。 在该方法中，通过在沟槽结构中形成多个绝缘体层和多个电极而形成一系列电容器，其中每个电极与每个绝缘体层交替地形成。 该方法还包括平面化电极以形成多个电容器的接触区域。
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5.发明申请METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR 审中-公开将商业微处理器转换为辐射加工处理器和结果处理器的方法公开(公告)号：US20110088008A1
公开(公告)日：2011-04-14
申请号：US12579159
申请日：2009-10-14
申请人： John A. FIFIELD , Mark C. HAKEY , Jason D. HIBBELER , James S. NAKOS , Tak H. NING , Kenneth P. RODBELL , Ronald D. ROSE , Henry H.K. TANG , Larry WISSEL
发明人： John A. FIFIELD , Mark C. HAKEY , Jason D. HIBBELER , James S. NAKOS , Tak H. NING , Kenneth P. RODBELL , Ronald D. ROSE , Henry H.K. TANG , Larry WISSEL
CPC分类号： G06F17/5068 , G06F11/1048 , G06F17/505
摘要： A method is provided to convert commercial microprocessors to radiation-hardened processors and, more particularly, a method is provided to modify a commercial microprocessor for radiation hardened applications with minimal changes to the technology, design, device, and process base so as to facilitate a rapid transition for such radiation hardened applications. The method is implemented in a computing infrastructure and includes evaluating a probability that one or more components of an existing commercial design will be affected by a single event upset (SEU). The method further includes replacing the one or more components with a component immune to the SEU to create a final device.
摘要翻译： 提供了一种将商业微处理器转换为辐射硬化处理器的方法，更具体地，提供了一种方法，以便以最小的技术，设计，设备和工艺基础的改变来修改用于辐射硬化应用的商业微处理器，以便于 这种辐射硬化应用的快速过渡。 该方法在计算基础设施中实现，并且包括评估现有商业设计的一个或多个组件将受到单个事件不适（SEU）的影响的概率。 该方法还包括用免疫SEU的成分替换一个或多个成分以产生最终的装置。
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6.发明申请DUAL CONTACT TRENCH RESISTOR AND CAPACITOR IN SHALLOW TRENCH ISOLATION (STI) AND METHODS OF MANUFACTURE 有权双重接触式电阻和电容器在低温隔离（STI）和制造方法公开(公告)号：US20120299152A1
公开(公告)日：2012-11-29
申请号：US13114543
申请日：2011-05-24
CPC分类号： H01L28/20 , H01L27/016 , H01L27/0682 , H01L28/40 , H01L28/90
摘要： A resistor and capacitor are provided in respective shallow trench isolation structures. The method includes forming a first and second trench in a substrate and forming a first insulator layer within the first and second trench. The method includes forming a first electrode material within the first and second trench, on the first insulator layer, and forming a second insulator layer within the first and second trench and on the first electrode material. The method includes forming a second electrode material within the first and second trench, on the second insulator layer. The second electrode material pinches off the second trench. The method includes removing a portion of the second electrode material and the second insulator layer at a bottom portion of the first trench, and filling in the first trench with additional second electrode material. The additional second electrode material is in electrical contact with the first electrode material.
摘要翻译： 在相应的浅沟槽隔离结构中提供电阻器和电容器。 该方法包括在衬底中形成第一和第二沟槽，并在第一和第二沟槽内形成第一绝缘体层。 该方法包括在第一和第二沟槽内，在第一绝缘体层上形成第一电极材料，以及在第一和第二沟槽内和第一电极材料上形成第二绝缘体层。 该方法包括在第二绝缘体层上在第一和第二沟槽内形成第二电极材料。 第二电极材料夹住第二沟槽。 该方法包括在第一沟槽的底部处去除第二电极材料和第二绝缘体层的一部分，并且用另外的第二电极材料填充第一沟槽。 附加的第二电极材料与第一电极材料电接触。
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7.发明申请DUAL CONTACT TRENCH RESISTOR IN SHALLOW TRENCH ISOLATION (STI) AND METHODS OF MANUFACTURE 有权浅层隔离（STI）和制造方法中的双接触式电镀电阻公开(公告)号：US20120205776A1
公开(公告)日：2012-08-16
申请号：US13025501
申请日：2011-02-11
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L28/20 , H01L21/76229 , H01L27/1116
摘要： The invention relates to a semiconductor structures and methods of manufacture and, more particularly, to a dual contact trench resistor in shallow trench isolation (STI) and methods of manufacture. In a first aspect of the invention, a method comprises forming a trench in a substrate; forming a first insulator layer within the trench; forming a first electrode within the trench, on the first insulator layer, and isolated from the substrate by the first insulator layer; forming a second insulator layer within the trench and on the first electrode; and forming a second electrode within the trench, on the second insulator layer, and isolated from the substrate by the first insulator layer and the second insulator layer.
摘要翻译： 本发明涉及一种半导体结构及其制造方法，更具体地涉及浅沟槽隔离（STI）中的双接触沟槽电阻器及其制造方法。 在本发明的第一方面中，一种方法包括在衬底中形成沟槽; 在所述沟槽内形成第一绝缘体层; 在所述沟槽内形成第一电极，在所述第一绝缘体层上，并通过所述第一绝缘体层与所述衬底隔离; 在所述沟槽内和所述第一电极上形成第二绝缘体层; 以及在所述沟槽内，在所述第二绝缘体层上形成第二电极，并且通过所述第一绝缘体层和所述第二绝缘体层与所述衬底隔离。
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