公开(公告)号：US20090196213A1

公开(公告)日：2009-08-06

申请号：US12420318

申请日：2009-04-08

申请人： Jianfeng ZHONG ,  Geng WANG

发明人： Jianfeng ZHONG ,  Geng WANG

IPC分类号： H04H20/71

CPC分类号： H04W36/06 ,  H04L12/1868 ,  H04L12/1895 ,  H04W48/08 ,  H04W48/16

摘要： A system and a device for controlling bearer change are provided. The system includes a bearer change notifying entity and a bearer change control entity. The bearer change notifying entity is adapted to acquire information that a bearer needs to be changed, and send a bearer change notice to the bearer change control entity. The bearer change control entity is adapted to determine and control conversion from a multicast bearer mode to a unicast bearer mode or conversion from the unicast bearer mode to the multicast bearer mode according to the received bearer change notice. Further, a method for controlling bearer change is also provided. The system, the device, and the method are capable of sensing changes in multicast capability and user will and establishing the unicast/multicast bearer mode for data transmission

摘要翻译： 提供了一种用于控制承载变化的系统和装置。 系统包括承载变化通知实体和承载变更控制实体。 承载变化通知实体适于获取需要改变承载的信息，并向承载变更控制实体发送承载变更通知。 承载变更控制实体根据所接收到的承载变更通知，决定并控制从组播承载模式到单播承载模式的转换，或从单播承载模式到组播承载模式的转换。 此外，还提供了一种用于控制承载变化的方法。 系统，设备和方法能够检测组播能力的变化，用户将能够建立用于数据传输的单播/组播承载模式

公开(公告)号：US20130005129A1

公开(公告)日：2013-01-03

申请号：US13612069

申请日：2012-09-12

申请人： Sivananda KANAKASABAPATHY ,  Hemanth JAGANNATHAN ,  Geng WANG

发明人： Sivananda KANAKASABAPATHY ,  Hemanth JAGANNATHAN ,  Geng WANG

IPC分类号： H01L21/283

CPC分类号： H01L27/10826 ,  H01L21/26586 ,  H01L21/845 ,  H01L27/10879 ,  H01L27/10891 ,  H01L27/1211

摘要： Various embodiment integrate embedded dynamic random access memory with fin field effect transistors. In one embodiment, a first fin structure and at least a second fin structure are formed on a substrate. A deep trench area is formed between the first and second fin structures. A high-k metal gate is formed within the deep trench area. The high-k metal gate includes a high-k dielectric layer and a metal layer. A polysilicon material is deposited within the deep trench area adjacent to the metal layer. The high-k metal gate and the polysilicon material are recessed and etched to an area below a top surface of a substrate insulator layer. A poly strap is formed in the deep trench area. The poly strap is dimensioned to be below a top surface of the first and second fin structures. The first and second fin structures are electrically coupled to the poly strap.

摘要翻译： 各种实施例将嵌入式动态随机存取存储器与鳍式场效应晶体管集成。 在一个实施例中，在衬底上形成第一鳍结构和至少第二鳍结构。 在第一和第二翅片结构之间形成深沟槽区域。 在深沟槽区域内形成高k金属栅极。 高k金属栅极包括高k电介质层和金属层。 多晶硅材料沉积在与金属层相邻的深沟槽区域内。 高k金属栅极和多晶硅材料被凹入并蚀刻到衬底绝缘体层的顶表面下方的区域。 在深沟槽区域中形成多晶带。 该多晶带的尺寸设计成在第一和第二鳍结构的顶表面下方。 第一和第二翅片结构电耦合到多晶带。

公开(公告)号：US20110316061A1

公开(公告)日：2011-12-29

申请号：US12822492

申请日：2010-06-24

申请人： Joseph ERVIN ,  Jeffrey B. JOHNSON ,  Kevin MCSTAY ,  Paul C. PARRIES ,  Chengwen PEI ,  Geng WANG ,  Yanli ZHANG

发明人： Joseph ERVIN ,  Jeffrey B. JOHNSON ,  Kevin MCSTAY ,  Paul C. PARRIES ,  Chengwen PEI ,  Geng WANG ,  Yanli ZHANG

IPC分类号： H01L27/12 ,  H01L21/84

CPC分类号： H01L21/84 ,  H01L21/76237 ,  H01L27/10847 ,  H01L27/1203

摘要： Semiconductor structures and methods to control bottom corner threshold in a silicon-on-insulator (SOI) device. A method includes doping a corner region of a semiconductor-on-insulator (SOI) island. The doping includes tailoring a localized doping of the corner region to reduce capacitive coupling of the SOI island with an adjacent structure.

摘要翻译： 半导体结构和方法来控制绝缘体上硅（SOI）器件中的底角阈值。 一种方法包括掺杂绝缘体上半导体（SOI）岛的角区域。 掺杂包括定制角区域的局部掺杂以减少SOI岛与相邻结构的电容耦合。

公开(公告)号：US20120064694A1

公开(公告)日：2012-03-15

申请号：US12880419

申请日：2010-09-13

申请人： Roger A. BOOTH, JR. ,  Kangguo CHENG ,  Joseph ERVIN ,  Chengwen PEI ,  Ravi M. TODI ,  Geng WANG ,  Yanli ZHANG

发明人： Roger A. BOOTH, JR. ,  Kangguo CHENG ,  Joseph ERVIN ,  Chengwen PEI ,  Ravi M. TODI ,  Geng WANG ,  Yanli ZHANG

IPC分类号： H01L21/02

CPC分类号： H01L29/66181 ,  H01L27/1087

摘要： A method of forming a deep trench structure for a semiconductor device includes forming a mask layer over a semiconductor substrate. An opening in the mask layer is formed by patterning the mask layer, and a deep trench is formed in the semiconductor substrate using the patterned opening in the mask layer. A sacrificial fill material is formed over the mask layer and into the deep trench. A first portion of the sacrificial fill material is recessed from the deep trench and a first dopant implant forms a first doped region in the semiconductor substrate. A second portion of the sacrificial fill material is recessed from the deep trench and a second dopant implant forms a second doped region in the semiconductor substrate, wherein the second doped region is formed underneath the first doped region such that the second doped region and the first doped region are contiguous with each other.

摘要翻译： 形成半导体器件的深沟槽结构的方法包括在半导体衬底上形成掩模层。 通过对掩模层进行构图来形成掩模层中的开口，并且使用掩模层中的图案化开口在半导体衬底中形成深沟槽。 牺牲填充材料形成在掩模层上并进入深沟槽中。 牺牲填充材料的第一部分从深沟槽凹陷，并且第一掺杂剂注入在半导体衬底中形成第一掺杂区域。 牺牲填充材料的第二部分从深沟槽凹陷，并且第二掺杂剂注入在半导体衬底中形成第二掺杂区，其中第二掺杂区形成在第一掺杂区的下方，使得第二掺杂区和第一掺杂区 掺杂区域彼此邻接。