Abstract:
There is provided a slave network interface circuit for improving the parallelism of an On-Chip network, including: a MUX for selecting one of a Write Address inputted from the On-Chip network and a Read Address to read data from a slave module, which is inputted from a slave network interface (SNI) controller, in response to the control of the SNI controller and inputs the selected address to the slave module; and the SNI controller for controlling writing and reading data at the slave module and generating a Read Address to store data read from the slave module and to transfer to the On-Chip network.
Abstract:
A finite impulse response filter of 1:4 interpolation with 108 taps for outputting filter output data of 8 bits with respect to filter input data of 4 bits includes four shifting and storing unit of 27 bits for unifying bits of filter input data of 4 bits, which is 2's complement to shift and store the bi-unified input data, first selection unit for selecting any one of the input data stored in the four shifting and storing unit of 27 bits, address generating unit for generating addresses of lookup tables corresponding to each of a plurality of filter coefficients groups, first to fourth lookup table groups for generating filter outputs of each filter coefficients group, four accumulating unit for shifting the filter outputs of the filter coefficients groups respectively outputted in parallel from the first to the fourth lookup table groups, and second selection unit for serially converting the outputs from each of the four accumulators in accordance with filter coefficients groups.
Abstract:
Disclosed are a turbo decoder, which applies a base-2 binary LogMAP algorithm in implementing a turbo decoder to thereby reduce the hardware requirement and implement a high-speed turbo decoder, which comprising a split for splitting the sum of two input state metrics into an integral and a decimal part; a comparator for comparing the integral parts of the two state metrics to extract a maximum and a minimum integer; a subtractor for obtaining a difference between the original integral part and the maximum or minimum integer value; a lookup table for calculating the sum of exponential terms of base-2 function in the decimal parts; a shifter for shifting only a decimal part with a smaller integral part by the difference; an adder for adding the decimal part and a decimal part with a larger integral part; a log pre-processing block for applying a base-2 logarithm on the decimal part to thereby obtain a final value for the decimal part; and an adder for adding the maximum integral value and the final value for the decimal part to thereby obtain a final value of the base-2 function.
Abstract:
A moving picture decoder further includes a plurality of switches in a mesh configuration, and at least one On-Chip Network (OCN) arranged in a star configuration and coupled to the plurality of switches. The On-Chip Network (OCN) includes a plurality of slave modules coupled to the On-Chip Network (OCN) and arranged in a star configuration.
Abstract:
Provided are a self-controlled functional module, and a control method therefor and a system using the same. The functional module, includes: a data input unit for receiving data; a function process unit for performing a specific function based on input data transmitted through the data input unit; a data output unit for outputting a result processed by the function process unit; and an operation control unit for receiving state information individually from the data input unit and the data output unit and controlling operation start of the function process unit based on state information of the data input unit and the data output unit.
Abstract:
In the apparatus and method for separating carrier of multicarrier wireless communication receiver system, each carrier separation is performed after a quantization in a wireless communication receiver system such as a received multicarrier CDMA (Code Division Multiple Access) etc., to thereby reduce the whole number of quantizers and separate multicarrier from a received signal. For that, the apparatus for separating the carrier of the multicarrier wireless communication receiver system includes an internal oscillating unit for generating internal multicarrier; a plurality of frequency transition units for respectively down-converting the multicarrier generated by the internal oscillating unit and moving it to frequency of “0” as a frequency center; and a plurality of filtering units for individually filtering the respective carrier moved by the plurality of frequency transition units to the frequency center as the frequency of “0”, through a low frequency pass band and for providing it as an input of a rake receiver.
Abstract:
A wireless data communication apparatus using the diffused infrared-ray antennas comprising: a plurality of terminals having their own optical communication modules for transmitting and receiving infrared-ray signals, wherein the optical communication module includes a parabolic shaped infrared-ray antenna; and a repeater which receives the infrared-ray signals transmitted from the plurality of terminals and transmits the infrared-ray signals to the plurality of terminals, wherein the repeater includes a parabolic shaped infrared-ray antenna.
Abstract:
Provided is an On-Chip network (OCN) based moving picture decoder. The moving picture decoder includes: a plurality of switches for providing a parallel data transmission path between a predetermined master module and the other master module, a parallel data transmission path between a predetermined master module and a predetermined slave module, and a parallel data transmission path between a predetermined slave module and the other slave module; and a plurality of On-Chip Networks (OCNs) for providing a local parallel data transmission path between predetermined slave modules and a parallel data transmission path between a slave module in a corresponding area and the switches, wherein a OCN structure of the moving picture decoder globally has a mesh structure with the switches as medium and locally has a star structure with each of the ONCs as medium.
Abstract:
A 108-tap 1:4 interpolation FIR filter device for digital mobile telecommunication having a single bit input that employs a look-up table minimum scheme and a pipeline structure in which the size of the entire look-up tables is significantly reduced by dividing four coefficient groups into three parts, respectively, and effectively using the symmetry of the 108-tap filter coefficient and the symmetry within the look-up table. The FIR filter includes an input shift register and selector for processing a single bit input of four channels, an address generator for producing addresses of the look-up table, look-up table group 0˜3 for producing filter outputs group by group via the look-up table and the calculator using the address as an input, a pipeline register I for delaying the filter outputs for coefficient group which are outputted in parallel, a group selector for converting the delayed outputs in serial channel by channel, and a pipeline register II for matching the time of filter output channel by channel.
Abstract:
In the present invention, a reference block data within a current image from which a motion vector will be obtained and corresponding search region data within reproduced previous image are stored in a reference block and a search region data memory, respectively. A motion vector of two pixels unit is performed using the reference block and the search region data stored in the memory, thus resulting in obtained a motion vector of two pixels unit. At this time, the reference block and the search region data are used by performing 2:1 sampling in a horizontal direction and a vertical direction, respectively and the search range is −7˜+7. The structure of the motion search is consisted of a memory for storing a reference block (8×8) of current images and a memory (24×8) for storing a search region storing reproduced previous images. The structure further includes a processing element (PE) array block for obtaining SAD (sum of absolute difference) among candidate blocks within the search region and a block for obtaining the smallest motion vector among the candidate SADs. If hardware is implemented using the two-step search algorithm among the motion estimation of the present invention, a lot of data bandwidth of the reference memory and a memory having a large size are required. The down sampling scheme and the bandwidth of the reference memory has a structure in which a slice is previously downloaded before a pipeline when it downloads from the external memory. In an actual pipeline operation, it is implemented by the bandwidth of ⅓. Also, as it has independent memories, it can operate even at low frequency without degrading the performance.