公开(公告)号：US07454670B2

公开(公告)日：2008-11-18

申请号：US11043214

申请日：2005-01-27

申请人： Jin-hyuk Kim ,  Hyun-mo Chung ,  Sung-ju Myoung ,  Jae-wook Cheong ,  Chan-ik Park ,  Tae-sun Chung

发明人： Jin-hyuk Kim ,  Hyun-mo Chung ,  Sung-ju Myoung ,  Jae-wook Cheong ,  Chan-ik Park ,  Tae-sun Chung

IPC分类号： G11C29/00

CPC分类号： G11C29/76 ,  G06F12/0246

摘要： A data management apparatus and method used in a system using one or more flash memories, which can deal with defective blocks in each of the flash memories using different methods depending on how the system manages data stored in each of the flash memories. The data management apparatus includes a device driver, which controls the operation of one or more flash memories, and a controller, which transfers data stored in a defective block of one of the flash memories to a predetermined block in the flash memory.

摘要翻译： 一种在使用一个或多个闪存的系统中使用的数据管理装置和方法，其可以使用不同的方法来处理每个闪速存储器中的缺陷块，这取决于系统如何管理存储在每个闪速存储器中的数据。 数据管理装置包括控制一个或多个闪速存储器的操作的设备驱动器和将存储在其中一个闪速存储器的缺陷块中的数据传送到闪速存储器中的预定块的控制器。

公开(公告)号：US20050162947A1

公开(公告)日：2005-07-28

申请号：US11043214

申请日：2005-01-27

申请人： Jin-hyuk Kim ,  Hyun-mo Chung ,  Sung-ju Myoung ,  Jae-wook Cheong ,  Chan-ik Park ,  Tae-sun Chung

发明人： Jin-hyuk Kim ,  Hyun-mo Chung ,  Sung-ju Myoung ,  Jae-wook Cheong ,  Chan-ik Park ,  Tae-sun Chung

IPC分类号： G06F12/16 ,  G06F12/02 ,  G11C29/00 ,  G11C7/00

CPC分类号： G11C29/76 ,  G06F12/0246

摘要： A data management apparatus and method used in a system using one or more flash memories, which can deal with defective blocks in each of the flash memories using different methods depending on how the system manages data stored in each of the flash memories. The data management apparatus includes a device driver, which controls the operation of one or more flash memories, and a controller, which transfers data stored in a defective block of one of the flash memories to a predetermined block in the flash memory.

摘要翻译： 一种在使用一个或多个闪存的系统中使用的数据管理装置和方法，其可以使用不同的方法来处理每个闪速存储器中的缺陷块，这取决于系统如何管理存储在每个闪速存储器中的数据。 数据管理装置包括控制一个或多个闪速存储器的操作的设备驱动器和将存储在其中一个闪速存储器的缺陷块中的数据传送到闪速存储器中的预定块的控制器。

公开(公告)号：US07676626B2

公开(公告)日：2010-03-09

申请号：US11640304

申请日：2006-12-18

申请人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

发明人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

IPC分类号： G06F13/00 ,  G11C5/06

CPC分类号： G06F3/0643 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/068 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.

摘要翻译： 提供了一种系统，其根据一个或多个数据特征将从应用或文件系统接收的数据存储在单级单元和多级单元的非易失性存储器系统中。 非易失性存储器系统包括具有形成MLC区域的多个多电平单元和形成SLC区域的多个单电平单元的非易失性存储单元阵列，以及分析写入数据的特性的接口单元 并产生相应的数据特征信号。 闪速转换层接收数据特征信号，并且基于写入数据是否被文件访问来确定写入数据是否应存储在MLC区域或SLC区域中，或者是否与写入相关联的地址 数据频繁更新。

公开(公告)号：US08351275B2

公开(公告)日：2013-01-08

申请号：US12776620

申请日：2010-05-10

申请人： Hyun-jin Choi ,  Chan-ik Park

发明人： Hyun-jin Choi ,  Chan-ik Park

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C16/32

摘要： Provided is a programming method that increases writing performance of a flash memory device. The programming method for a flash memory device that includes a plurality of banks including a plurality of memory cells for storing multi-bit data includes the following: programming a most significant bit (MSB) page with respect to banks of a first bank group; programming a least significant bit (LSB) page with respect to banks of a second bank group; programming the MSB page with respect to the banks of the second bank group; and programming the LSB page with respect to the banks of the first bank group.

摘要翻译： 提供了一种提高闪存设备的写入性能的编程方法。 一种包括多个存储多位数据存储单元的多个存储单元的闪速存储器件的编程方法，包括以下步骤：针对第一组组的存储体编程最高位（MSB）页; 编程相对于第二银行组的银行的最低有效位（LSB）页面; 针对第二银行集团的银行编程MSB页面; 并且相对于第一银行组的银行编程LSB页面。

公开(公告)号：US20060026372A1

公开(公告)日：2006-02-02

申请号：US11191074

申请日：2005-07-28

申请人： Jin-kyu Kim ,  Kwang-yoon Lee ,  Jin-soo Kim ,  Sun-young Park ,  Chan-ik Park ,  Jeong-uk Kang

发明人： Jin-kyu Kim ,  Kwang-yoon Lee ,  Jin-soo Kim ,  Sun-young Park ,  Chan-ik Park ,  Jeong-uk Kang

IPC分类号： G06F12/00

CPC分类号： G06F12/123 ,  G06F12/08 ,  G06F2212/2022 ,  Y02D10/13

摘要： A page replacement method is provided. The page replacement method includes (a) establishing a first page list in which a plurality of pages in a main memory are listed in an order that they have been used, (b) establishing a second page list in which some of the pages in the main memory whose images are stored in a storage medium are listed in an order that they have been used, and (c) storing data downloaded from the storage medium in the pages included in the second page list in an order opposite to the order that the corresponding pages are listed in the second page list.

摘要翻译： 提供页面替换方法。 页面替换方法包括：（a）建立第一页面列表，其中按照已经使用的顺序列出主存储器中的多个页面，（b）建立第二页面列表，其中， 其图像被存储在存储介质中的主存储器以它们已被使用的顺序列出，并且（c）以与第二页列表中包含的顺序相反的顺序将从存储介质下载的数据存储在包括在第二页列表中的页面中 相应的页面列在第二页列表中。

公开(公告)号：US20050080986A1

公开(公告)日：2005-04-14

申请号：US10886690

申请日：2004-07-09

申请人： Chan-ik Park

发明人： Chan-ik Park

IPC分类号： G06F12/12 ,  G06F12/00 ,  G06F12/02 ,  G06F12/08 ,  G06F12/10 ,  G11C16/02 ,  G11C16/26

CPC分类号： G06F12/0893 ,  G06F12/0246 ,  G06F12/0862 ,  G06F2212/7201 ,  G06F2212/7203

摘要： A priority-based flash memory control apparatus for XIP in a serial flash memory, a memory management method using the same, and a memory chip thereof. Efficient memory management is provided by assigning priorities to respective pages of a serial flash memory and storing the pages retrieved from the serial flash memory in a system memory or cache memory according to their priority. A memory management method using the flash memory control apparatus according to the present invention includes, if a request for reading data at a given logical address is received from a main control unit, searching for the data at the corresponding logical address by referring to a predetermined address translation table; and reading the data at the corresponding logical address from a system memory or a cache memory and transmitting the read data to the main control unit, depending on the results of the search.

摘要翻译： 用于串行闪存中的XIP的基于优先级的闪速存储器控制装置，使用其的存储器管理方法及其存储芯片。 通过将优先级分配给串行闪存的各个页面并根据其优先级将从串行闪存存储器检索到的页面存储在系统存储器或高速缓冲存储器中来提供有效的存储器管理。 使用根据本发明的闪速存储器控制装置的存储器管理方法包括：如果从主控制单元接收到对给定逻辑地址的读取数据的请求，则通过参照预定的方式搜索相应逻辑地址处的数据 地址转换表; 并且从系统存储器或高速缓冲存储器读取相应逻辑地址处的数据，并根据搜索结果将读取的数据发送到主控制单元。

公开(公告)号：US08489852B2

公开(公告)日：2013-07-16

申请号：US12815445

申请日：2010-06-15

申请人： Myung-hyun Jo ,  Chan-ik Park

发明人： Myung-hyun Jo ,  Chan-ik Park

IPC分类号： G06F12/00

CPC分类号： G06F12/00 ,  G06F12/0246 ,  G06F2212/7201 ,  Y02D10/13

摘要： A method of manipulating data includes receiving a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The method further includes mapping the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command. A system for manipulating data includes a host and a flash translation layer. The host transmits a data manipulation command for corresponding data, which corresponds to a first logical block address, to a second logical block address. The flash translation layer maps the second logical block address to a physical block address, which is mapped to the first logical block address, in response to the data manipulation command.

公开(公告)号：US08214582B2

公开(公告)日：2012-07-03

申请号：US12711461

申请日：2010-02-24

申请人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

发明人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

IPC分类号： G06F13/00 ,  G11C5/06

CPC分类号： G06F3/0643 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/068 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics. The non-volatile memory system includes a non-volatile memory cell array having a plurality of multi-level cells forming a MLC area and a plurality of single-level cells forming a SLC area, and an interface unit analyzing a characteristic of the write data and generating a corresponding data characteristic signal. A flash transition layer receives the data characteristic signal, and determines whether the write data should be stored in the MLC area or the SLC area based on whether or not the write data will be accessed by the file, or whether the address associated with the write data is frequently updated or not.

摘要翻译： 提供了一种系统，其根据一个或多个数据特征将从应用或文件系统接收的数据存储在单级单元和多级单元的非易失性存储器系统中。 非易失性存储器系统包括具有形成MLC区域的多个多电平单元和形成SLC区域的多个单电平单元的非易失性存储单元阵列，以及分析写入数据的特性的接口单元 并产生相应的数据特征信号。 闪速转换层接收数据特征信号，并且基于写入数据是否被文件访问来确定写入数据是否应存储在MLC区域或SLC区域中，或者是否与写入相关联的地址 数据频繁更新。

公开(公告)号：US20080195801A1

公开(公告)日：2008-08-14

申请号：US12021693

申请日：2008-01-29

申请人： Won-moon Cheon ,  Chan-ik Park

发明人： Won-moon Cheon ,  Chan-ik Park

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/0866 ,  G06F2212/214 ,  G06F2212/7201

摘要： Provided is a method for operating a buffer cache which is performed by a storage device including a flash memory. The method includes converting a logical block address requested from a host into a logical page number. A region in which a page corresponding to the logical page number is located is searched for. A physical block address corresponding to the logical block address is generated with reference to a mapping table of the region in which the page corresponding to the logical page number is located. The searching for of the region includes searching for a look-up table having information about a region in which a plurality of pages of the flash memory are located.

摘要翻译： 提供了一种用于操作由包括闪存的存储设备执行的缓冲器高速缓存的方法。 该方法包括将从主机请求的逻辑块地址转换为逻辑页号。 搜索与逻辑页码对应的页面所在的区域。 参照对应于逻辑页码的页面所在的区域的映射表生成对应于逻辑块地址的物理块地址。 搜索该区域包括搜索具有关于闪存的多个页面所在的区域的信息的查找表。

公开(公告)号：US20080126680A1

公开(公告)日：2008-05-29

申请号：US11640304

申请日：2006-12-18

申请人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

发明人： Yang-sup Lee ,  Prakash Talawar ,  Chan-ik Park

IPC分类号： G06F12/00

CPC分类号： G06F3/0643 ,  G06F3/0613 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0679 ,  G06F3/068 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7211 ,  G11C2211/5641

摘要： Provided is a system storing data received from an application or file system in a non-volatile memory system of single-level cells and multi-level cells in accordance with one or more data characteristics.

摘要翻译： 提供了一种系统，其根据一个或多个数据特征将从应用或文件系统接收的数据存储在单级单元和多级单元的非易失性存储器系统中。