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公开(公告)号:US20090143039A1
公开(公告)日:2009-06-04
申请号:US12077295
申请日:2008-03-18
申请人: Jiro Ishikawa , Norio Abe
发明人: Jiro Ishikawa , Norio Abe
IPC分类号: H04B1/18
CPC分类号: H04B7/0877 , H04B7/0814
摘要: An RSSI detecting unit measures a receiving power level of a signal receive from a base station, and notifies a mode change control unit of the measurement result. A Ec/Io detecting unit measures a Ec/Io level of the signal received from the base station, and notifies the mode change control unit of the measurement result. The mode change control unit discriminates the change of the operation mode in consideration of not only the receiving power level, but also the Ec/Io level, and does not change the Simultaneous-Mode from the Hybrid-Mode unless at least the Ec/Io level exceeds a threshold line.
摘要翻译: RSSI检测单元测量从基站接收的信号的接收功率电平,并向模式改变控制单元通知测量结果。 Ec / Io检测单元测量从基站接收的信号的Ec / Io电平,并向模式改变控制单元通知测量结果。 模式变化控制单元不仅考虑接收功率电平,而且考虑Ec / Io电平来区分操作模式的变化,并且不从混合模式改变同时模式,除非至少Ec / Io 水平超过阈值线。
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公开(公告)号:US20050128815A1
公开(公告)日:2005-06-16
申请号:US11002802
申请日:2004-12-03
申请人: Jiro Ishikawa , Takashi Yamaki , Toshihiro Tanaka , Yukiko Umemoto , Akira Kato
发明人: Jiro Ishikawa , Takashi Yamaki , Toshihiro Tanaka , Yukiko Umemoto , Akira Kato
IPC分类号: G11C16/02 , G11C7/00 , G11C16/06 , G11C16/16 , G11C16/30 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
摘要: An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.
摘要翻译: 分配擦除电流以减少内部电源电路的负载并减少用于擦除的驱动器的数量。 一种半导体数据处理装置具有:存储阵列,其具有排列成矩阵状的非易失性存储单元,分为多个擦除块,分别被指示一起擦除; 以及控制电路,其中控制电路控制施加到擦除块中的非易失性存储单元的两种擦除电压,这些擦除块被一起擦除,以从擦除块中选择擦除扇区,以便为每个擦除扇区执行擦除,从而 按时间划分每个擦除扇区的擦除。 时分擦除可以分配擦除电流。 使用两种擦除电压来选择擦除扇区。 没有为每个擦除扇区提供特定的驱动程序。
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公开(公告)号:US4983757A
公开(公告)日:1991-01-08
申请号:US500520
申请日:1990-03-28
申请人: Jiro Ishikawa , Hirofumi Higuchi , Shuji Ebata , Koichi Kida
发明人: Jiro Ishikawa , Hirofumi Higuchi , Shuji Ebata , Koichi Kida
IPC分类号: B01J31/02 , C07B61/00 , C07C67/20 , C07C69/54 , C07C69/675 , C07C231/08 , C07C231/10 , C07C233/03
CPC分类号: C07C231/08
摘要: Carboxylic acid esters and formamide are efficiently obtained for reacting carboxylic acid amides and formic acid esters, or carboxylic acid amides, alcohols and carbon monoxide in the presence of an alkaline earth metal oxide catalyst.
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4.
公开(公告)号:US4505821A
公开(公告)日:1985-03-19
申请号:US612211
申请日:1984-05-21
申请人: Yasuyuki Kaneko , Masao Ito , Yukio Ogura , Jiro Ishikawa
发明人: Yasuyuki Kaneko , Masao Ito , Yukio Ogura , Jiro Ishikawa
CPC分类号: C02F3/1231 , C02F3/34 , Y02W10/15 , Y10S210/909 , Y10S435/911
摘要: Waste liquors containing phenolics and formaldehyde can quickly and economically be treated by a microorganism of genus Trichosporon to prevent water pollution.
摘要翻译: 含有酚醛和甲醛的废液可以快速,经济地用Trichosporon属的微生物进行处理,以防止水污染。
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公开(公告)号:US07110295B2
公开(公告)日:2006-09-19
申请号:US11002802
申请日:2004-12-03
申请人: Jiro Ishikawa , Takashi Yamaki , Toshihiro Tanaka , Yukiko Umemoto , Akira Kato
发明人: Jiro Ishikawa , Takashi Yamaki , Toshihiro Tanaka , Yukiko Umemoto , Akira Kato
IPC分类号: G11C16/04
摘要: An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.
摘要翻译: 分配擦除电流以减少内部电源电路的负载并减少用于擦除的驱动器的数量。 一种半导体数据处理装置具有:存储阵列,其具有排列成矩阵状的非易失性存储单元,分为多个擦除块,分别被指示一起擦除; 以及控制电路,其中控制电路控制施加到擦除块中的非易失性存储单元的两种擦除电压,这些擦除块被一起擦除,以从擦除块中选择擦除扇区,以便为每个擦除扇区执行擦除,从而 按时间划分每个擦除扇区的擦除。 时分擦除可以分配擦除电流。 使用两种擦除电压来选择擦除扇区。 没有为每个擦除扇区提供特定的驱动程序。
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公开(公告)号:US4776929A
公开(公告)日:1988-10-11
申请号:US120150
申请日:1987-11-12
申请人: Tetsuo Aoyama , Eiji Shima , Jiro Ishikawa , Naoto Sakurai
发明人: Tetsuo Aoyama , Eiji Shima , Jiro Ishikawa , Naoto Sakurai
CPC分类号: C25B3/00
摘要: A process for production of high purity quarternary ammonium hydroxides, comprising electrolyzing quarternary ammonium hydrogencarbonates represented by the general formula: ##STR1## (wherein the symbols are as defined in the appended claims) in an electrolytic cell comprising an anode compartment and a cathode compartment defined by a cation exchange membrane. In accordance with this process, high purity quarternary ammonium hydroxides can be produced with high electrolytic efficiency and further without causing corrosion of equipment. Since the quarternary ammonium hydroxides produced by the present invention are of high purity, they can be effectively used as, for example, cleaners, etchants or developers for wafers in the production of IC and LSI in the field of electronics and semiconductors.
摘要翻译: 一种用于生产高纯度季铵氢氧化物的方法,包括电解季节性碳酸氢铵,其由下列通式表示:其中符号如所附权利要求中所定义,其中电解池包括阳极室和阴极隔室 通过阳离子交换膜。 根据该方法,可以以高电解效率生产高纯度季铵氢氧化物,而且不会引起设备腐蚀。 由于本发明生产的季铵氢氧化物具有高纯度,所以它们可以有效地用作例如在电子和半导体领域中用于制造IC和LSI的晶片的清洁剂,蚀刻剂或显影剂。
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