Abstract:
A battery powered radio device includes a transmitter, a control circuit, and a lockout circuit. The transmitter transmits radio communications and the transmitter includes a power amplifier which generates an amplified radiofrequency output signal. More particularly, the power amplifier uses both a positive supply voltage and a negative bias voltage for operation wherein the negative bias voltage is less than a supply ground voltage. The control circuit enables the power amplifier during transmission, and the control circuit includes a switch coupled in series between a positive supply voltage and the power amplifier. The switch is activated in response to a transmit activation signal when the negative bias voltage is coupled to the power amplifier. The lockout circuit prevents activation of the switch in response to the transmit activation signal when the negative bias voltage is not coupled to the power amplifier. In addition, the switch can be activated in response to a transmit activation signal by applying the negative bias voltage to the switch control gate and deactivated in the absence of the transmit activation signal by applying the positive supply voltage to the switch control gate.
Abstract:
Circuitry, which includes multi-mode multi-band radio frequency (RF) power amplification circuitry, power amplifier (PA) control circuitry, and a PA-digital communications interface (DCI) is disclosed according to one embodiment of the circuitry. The PA control circuitry is coupled between the amplification circuitry and the PA-DCI, which is coupled to a digital communications bus, and configures the amplification circuitry. The amplification circuitry includes at least a first RF input and multiple RF outputs, such that at least some of the RF outputs are associated with multiple communications modes and at least some of the RF outputs are associated with multiple frequency bands. Configuration of the amplification circuitry associates one RF input with one RF output, and is correlated with configuration information defined by at least a first defined parameter set. The PA control circuitry stores at least a first look-up table (LUT), which provides the configuration information.
Abstract:
A configurable 2-wire/3-wire serial communications interface (C23SCI), which includes start-of-sequence (SOS) detection circuitry and sequence processing circuitry, is disclosed. When the SOS detection circuitry is coupled to a 2-wire serial communications bus, the SOS detection circuitry detects an SOS of a received sequence based on a serial data signal and a serial clock signal. When the SOS detection circuitry is coupled to a 3-wire serial communications bus, the SOS detection circuitry detects the SOS of the received sequence based on a chip select (CS) signal. In response to detecting the SOS, the SOS detection circuitry provides an SOS detection signal to the sequence processing circuitry, which initiates processing of the received sequence using the serial data signal and the serial clock signal. The received sequence is associated with one of multiple serial communications protocols.
Abstract:
A direct current (DC)-DC converter and radio frequency (RF) power amplifier (PA) circuitry are disclosed. The DC-DC converter provides an envelope power supply signal to the RF PA circuitry based on a first power supply output control signal. As a temperature of the RF PA circuitry changes, the envelope power supply signal may need to be adjusted to meet temperature compensation requirements of the RF PA circuitry. With adequate thermal coupling between the DC-DC converter and the RF PA circuitry, adjustments to the envelope power supply signal may be based on temperature measurements of the DC-DC converter. A desired correction of the first power supply output control signal is determined based on a measured temperature of the DC-DC converter and the temperature compensation requirements of the RF PA circuitry. The first power supply output control signal is adjusted based on the desired correction.
Abstract:
The present disclosure relates to a flexible direct current (DC)-DC converter, which includes a charge pump buck power supply and a buck power supply. The charge pump buck power supply and the buck power supply are voltage compatible with one another at respective output inductance nodes to provide flexibility. In one embodiment of the DC-DC converter, capacitances at the output inductance nodes are at least partially isolated from one another by using at least an isolating inductive element between the output inductance nodes to increase efficiency. In an alternate embodiment of the DC-DC converter, the output inductance nodes are coupled to one another, such that the charge pump buck power supply and the buck power supply share a first inductive element, thereby eliminating the isolating inductive element, which reduces size and cost but may also reduce efficiency.
Abstract:
A split current current digital-to-analog converter (IDAC) and a radio frequency (RF) power amplifier (PA) stage are disclosed. The split current IDAC operates in a selected one of a group of DDS operating modes and provides a group of array bias signals based on the selected one of the group of DDS operating modes. Each of the group of array bias signals is a current signal. The RF PA stage includes a group of arrays of amplifying transistor elements. The RF PA stage biases at least one of the group of arrays of amplifying transistor elements based on the group of array bias signals. Further, the RF PA stage receives and amplifies an RF stage input signal to provide an RF stage output signal using at least one of the group of arrays of amplifying transistor elements that is biased.
Abstract:
RF PA circuitry and a DC-DC converter, which includes an RF PA envelope power supply and DC-DC control circuitry, are disclosed. The PA envelope power supply provides an envelope power supply signal to the RF PA circuitry. The DC-DC control circuitry has a DC-DC look-up table (LUT) structure, which has at least a first DC-DC LUT. The DC-DC control circuitry uses DC-DC LUT index information as an index to the DC-DC LUT structure to obtain DC-DC converter operational control parameters. The DC-DC control circuitry then configures the PA envelope power supply using the DC-DC converter operational control parameters. Using the DC-DC LUT structure provides flexibility in configuring the DC-DC converter for different applications, for multiple static operating conditions, for multiple dynamic operating conditions, or any combination thereof.
Abstract:
Radio frequency (RF) power amplifier (PA) circuitry, which transmits RF signals is disclosed. The RF PA circuitry includes a final stage, a final stage current digital-to-analog converter (IDAC), and a final stage temperature compensation circuit. A final stage current reference circuit may provide an uncompensated final stage reference current to the final stage temperature compensation circuit, which receives and temperature compensates the uncompensated final stage reference current to provide a final stage reference current. The final stage IDAC uses the final stage reference current in a digital-to-analog conversion to provide a final stage bias signal to bias the final stage. The temperature compensation provided by the final stage temperature compensation circuit is selectable.
Abstract:
A charge pump of a PA bias power supply, PA bias circuitry, and a process to optimize efficiency of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply bypass operating mode unless a DC power supply voltage is adequate to allow the PA bias circuitry to provide minimum output regulation voltage at a specified current. Otherwise, the bias supply pump-up operating mode is selected. The charge pump operates more efficiently in the bias supply bypass operating mode than in the bias supply pump-up operating mode; therefore, selection of the bias supply bypass operating mode, when possible, increases efficiency.
Abstract:
A sample-and-hold (SAH) current estimating circuit and a first switching power supply are disclosed. The first switching power supply provides a first switching power supply output signal based on a series switching element and a setpoint. The SAH current estimating circuit samples a voltage across the series switching element of the first switching power supply during an ON state of the series switching element and during a ramping signal peak to provide an SAH output signal based on an estimate of an output current of the first switching power supply output signal. The first switching power supply selects the ON state of the series switching element, such that during the ramping signal peak, the series switching element has a series current having a magnitude, which is about equal to a magnitude of the output current of the first switching power supply output signal.