摘要:
A method, system, apparatus, article of manufacture, and computer program product provide the ability to non-destructively generate a file based master. A domestic source (having domestic audio and video content) with textless content (have portions of the domestic source that is devoid of text) is obtained. A localized source (e.g., localized audio-video) based on the domestic source is received. The localized video is compared to the domestic source to determine differences. The localized video is bladed and realigned with the domestic source. Metadata (of the differences) is transposed onto the domestic source. Texted portions in the domestic source are obscured with corresponding portions of the textless content. Texted material (based on the localized video and texted portions) is created. The localized video content and the textless content are discarded. The domestic source, localized audio content, created texted material; and metadata are combined into a playlist that represents a localized file based master.
摘要:
A polarization control system includes a light source that generates two light beams with different polarization states and optical frequencies. A polarization state modulator changes the polarization states of the two light beams. A first detector path generates a first beat signal from the two light beams passing through a first polarizer. A second detector path generates a second beat signal from the two light beams passing through a second polarizer that is oriented substantially orthogonal to the first polarizer. An amplitude detector generates an amplitude beat signal from the first and the second beat signals. The system then uses the amplitude beat signal to determine how to adjust the polarization state modulator in order to generate the first and the second light beams with the desired polarization states.
摘要:
A method and related apparatus is provided for a processor having a number of registers, wherein instructions are sequentially issued to move through a sequence of execution stages, from an initial stage to a final write back stage. As a method, an embodiment includes the step of issuing a first instruction, such as an FMA instruction, to move through the sequence of execution stages, the first instruction being directed to a specified one of the registers. The method further includes issuing a second instruction to move through the execution stages, the second instruction being issued after the first instruction has issued, but before the first instruction reaches the final write back stage. The second instruction is likewise directed to the specified register, and comprises either a store instruction or a load instruction, selectively. R and W bits corresponding to the specified register are used to ensure that a store instruction does not read data from, and that a load instruction does not write data to the specified register, respectively, before the first instruction is moved to the final write back stage.
摘要:
The invention provides a color processing system comprising an image capture device for capturing a scene and providing first color image data representative of the scene. A color space transformer is coupled to the image capture device for transforming the first color image data to second color image data. A first display device is coupled to the color transformer. The first display device displays the scene as represented by the second color image data. The color transformer includes a processor programmed to perform a matrix operation upon the first color image data by selecting matrix elements from a look up table (LUT) comprising pre-computed values.
摘要:
A method and apparatus for steering instructions dynamically, at issue time, so as to maximize the efficiency of use of execution units being shared by multiple threads being processed by an SMT processor. Resource vectors are used at issue time to redirect instructions, from threads being processed simultaneously, to shared resources for which the multiple threads are competing. The existing resource vectors for instructions that are queued for issuance are analyzed and, where appropriate, dynamically recalculated and modified for maximum efficiency.
摘要:
A system for performing floating point arithmetic operations including a plurality of stages making up a pipeline, the stages including a first stage and a last stage. The system also includes a register file adapted for receiving a store instruction for input to the pipeline, where the data associated with the store instruction is dependent on a previous operation still in the pipeline. The system further includes a store register adapted for outputting the data associated with the store instruction to memory and a control unit having instructions. The instructions are directed to inputting the store instruction into the pipeline and to providing a path for forwarding the data associated with the store instruction from the last stage in the pipeline to the store register for use by the store instruction if the previous operation immediately precedes the store operation in the pipeline and if there is a data type match between the store instruction and the previous operation. In addition, the instructions are directed to inputting the store instruction into the pipeline and to providing a path for forwarding the data associated with the store instruction from the first stage in the pipeline to the store register for use by the store instruction if the previous operation precedes the store operation by one or more stage in the pipeline and if there is a data type match between the store instruction and the previous operation.
摘要:
An apparatus and method for dependency tracking and register file bypass controls using a scannable register file are provided. With the apparatus and method, a scannable register file array is provided and used to track the stage of any instruction in the execution unit. Every entry in the target vector is updated every cycle to stay synchronized with the instructions in the execution unit. To keep the register file array synchronized with the instructions in the execution unit, a right shift of all the data in each entry of the register file array occurs every cycle. The scan port of the register file array cells is used as the shift function.