公开(公告)号：US20050051839A1

公开(公告)日：2005-03-10

申请号：US10655199

申请日：2003-09-04

申请人： Johnathan Faltermeier ,  Jeremy Stephens ,  David Dobuzinsky ,  Larry Clevenger ,  Munir Naeem ,  Chienfan Yu ,  Larry Nesbit ,  Rama Divakaruni ,  Michael Maldei

发明人： Johnathan Faltermeier ,  Jeremy Stephens ,  David Dobuzinsky ,  Larry Clevenger ,  Munir Naeem ,  Chienfan Yu ,  Larry Nesbit ,  Rama Divakaruni ,  Michael Maldei

IPC分类号： H01L21/60 ,  H01L21/8242 ,  H01L29/76

CPC分类号： H01L27/10888 ,  H01L21/76897 ,  H01L27/10864 ,  H01L27/10876 ,  H01L27/10891

摘要： A method of forming borderless contacts and a borderless contact structure for semiconductor devices. A preferred embodiment comprises using a second etch selectivity material disposed over a first etch selectivity material to preserve the first etch selectivity material during the etch processes for the various material layers of the semiconductor device while forming the borderless contacts.

摘要翻译： 形成无边界接触的方法和用于半导体器件的无边界接触结构。 优选实施例包括使用设置在第一蚀刻选择性材料上的第二蚀刻选择性材料，以在半导体器件的各种材料层的蚀刻工艺期间保持第一蚀刻选择性材料，同时形成无边界接触。

公开(公告)号：US20080113507A1

公开(公告)日：2008-05-15

申请号：US12014127

申请日：2008-01-15

申请人： David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

发明人： David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

IPC分类号： H01L21/441

CPC分类号： H01L21/84

摘要： Embodiments herein present a method for forming a poly filled substrate contact on a SOI structure. The method forms an insulator on a substrate and forms a substrate contact hole within the insulator. The insulator surface level is higher than final structure. Next, a poly overfill is performed, comprising filling the substrate contact hole with polysilicon and covering the insulator with the polysilicon. Specifically, the thickness of the polysilicon is greater than the size of the substrate contact hole. Following this, the polysilicon is etched, wherein a portion of the polysilicon is removed, and wherein the substrate contact hole is left partially filled with the polysilicon. Further, the etching of the polysilicon forms a concave recess within a top portion of the polysilicon. The etching of said polysilicon does not contact the substrate. The excess of insulator is polished off to the desired level.

摘要翻译： 本文的实施方案提供了一种用于在SOI结构上形成多孔填充衬底接触的方法。 该方法在衬底上形成绝缘体，并在绝缘体内形成衬底接触孔。 绝缘子表面水平高于最终结构。 接下来，执行聚过填料，包括用多晶硅填充衬底接触孔并用多晶硅覆盖绝缘体。 具体地，多晶硅的厚度大于基板接触孔的尺寸。 接下来，蚀刻多晶硅，其中去除多晶硅的一部分，并且其中衬底接触孔部分地被多晶硅填充。 此外，多晶硅的蚀刻在多晶硅的顶部内形成凹形凹部。 所述多晶硅的蚀刻不与衬底接触。 绝缘体的过剩被抛光到所需的水平。

公开(公告)号：US20070196963A1

公开(公告)日：2007-08-23

申请号：US11307762

申请日：2006-02-21

申请人： David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

发明人： David Dobuzinsky ,  Byeong Kim ,  Effendi Leobandung ,  Munir Naeem ,  Brian Tessier

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L21/84

摘要： Embodiments herein present a method for forming a poly filled substrate contact on a SOI structure. The method forms an insulator on a substrate and forms a substrate contact hole within the insulator. The insulator surface level is higher than final structure. Next, a poly overfill is performed, comprising filling the substrate contact hole with polysilicon and covering the insulator with the polysilicon. Specifically, the thickness of the polysilicon is greater than the size of the substrate contact hole. Following this, the polysilicon is etched, wherein a portion of the polysilicon is removed, and wherein the substrate contact hole is left partially filled with the polysilicon. Further, the etching of the polysilicon forms a concave recess within a top portion of the polysilicon. The etching of said polysilicon does not contact the substrate. The excess of insulator is polished off to the desired level.

摘要翻译： 本文的实施方案提供了一种用于在SOI结构上形成多孔填充衬底接触的方法。 该方法在衬底上形成绝缘体，并在绝缘体内形成衬底接触孔。 绝缘子表面水平高于最终结构。 接下来，执行聚过填料，包括用多晶硅填充衬底接触孔并用多晶硅覆盖绝缘体。 具体地，多晶硅的厚度大于基板接触孔的尺寸。 接下来，蚀刻多晶硅，其中去除多晶硅的一部分，并且其中衬底接触孔部分地被多晶硅填充。 此外，多晶硅的蚀刻在多晶硅的顶部内形成凹形凹部。 所述多晶硅的蚀刻不与衬底接触。 绝缘体的过剩被抛光到所需的水平。

公开(公告)号：US06821900B2

公开(公告)日：2004-11-23

申请号：US09757123

申请日：2001-01-09

申请人： Satish Athavale ,  Rajiv Ranade ,  Munir Naeem ,  Gangadhara Swami Mathad

发明人： Satish Athavale ,  Rajiv Ranade ,  Munir Naeem ,  Gangadhara Swami Mathad

IPC分类号： H01L21311

CPC分类号： H01L21/3065 ,  H01L21/32136 ,  H01L21/32137

摘要： A method for etching trenches in a substrate secures a wafer to an electrode in a plasma chamber and heats the wafer to a temperature of greater than 200 degrees Celsius. The wafer is exposed to a reactive plasma to etch trenches into the substrate of the wafer with minimal redeposition of etch by-products to avoid pinching off the trench and to promote further etching.

摘要翻译： 用于蚀刻衬底中的沟槽的方法将晶片固定到等离子体室中的电极，并将晶片加热到大于200摄氏度的温度。 将晶片暴露于反应等离子体，以最小的蚀刻副产物再沉积来将沟槽蚀刻到晶片的衬底中，以避免夹住沟槽并促进进一步蚀刻。