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公开(公告)号:US20150123689A1
公开(公告)日:2015-05-07
申请号:US14594872
申请日:2015-01-12
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Patrick J. Alladio , Russell F. Oberg , Brian Warwick , Gary W. Michalko
CPC classification number: G01R31/2891 , G01R1/0416 , G01R1/06738 , G01R1/06744 , G01R1/0735 , G01R3/00 , G01R31/2887 , G01R31/2889 , H01R43/16 , Y10T29/49204
Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface.
Abstract translation: 被测器件的端子通过一系列导电引脚对临时电连接到负载板上的对应接触焊盘。 销对通过插入器膜保持在适当的位置,该插入器膜包括面向被测器件的顶部接触板,面向负载板的底部接触板以及位于顶部和底部接触板之间的垂直弹性的非导电部件。 每个销对包括顶部和底部销,其分别延伸超过顶部和底部接触板,朝向被测设备和负载板。 顶部和底部销在相对于膜表面正常倾斜的界面处彼此接触。 当纵向压缩时,销沿着界面滑动朝向彼此平移。
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公开(公告)号:US09476936B1
公开(公告)日:2016-10-25
申请号:US14211016
申请日:2014-03-14
Applicant: Johnstech International Corporation
Inventor: David Johnson , Jeffrey Sherry , Harlan Faller , Brian Warwick , Sarosh Patel , John Bucher , Jay Drescher
IPC: G01R31/28
CPC classification number: G01R31/2891 , G01R31/2874
Abstract: The IC test system provides a system and method for thermal management of test pins. A test pin array (22) in a pin guide (24) is mounted in a retainer (20) which is located between an IC wafer (12) which contains IC devices to be tested (DUT) and a load board (40) which provides pathways to test signals to the DUT. On the other side of the load board is a contact plate (50) which together with the retainer straddles the load board. Leg extensions (36) pass through the load board apertures (42) and provide a thermal circuit from the contact plate to the retainer and to the pin array. On the upper side of the contact plate is a cooling/heating system with a thermal electric peltier device (62) and a further heat exchanger (64) as needed. Holes (44) are provided in the legs (36) to provide a supply of dry air to the wafer and pin array to minimize condensation as a result of cooling effects.
Abstract translation: IC测试系统提供了一种用于测试引脚热管理的系统和方法。 销引导件(24)中的测试针阵列(22)安装在位于包含要测试的IC器件(DUT)的IC晶片(12)和负载板(40)之间的保持器(20)中,该保持器 提供了向DUT测试信号的路径。 在负载板的另一侧是与保持架跨接负载板的接触板(50)。 腿部延伸部分(36)穿过负载板孔(42)并提供从接触板到保持器和引脚阵列的热回路。 在接触板的上侧是具有热电致动器装置(62)和另外的热交换器(64)的冷却/加热系统。 孔(44)设置在腿部(36)中,以向晶片和针阵列提供干燥空气供应,以使冷凝效果最小化。
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公开(公告)号:US20160209444A1
公开(公告)日:2016-07-21
申请号:US15082083
申请日:2016-03-28
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
IPC: G01R1/067
CPC classification number: G01R1/06744 , G01R1/067 , G01R1/06738 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49117
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
Abstract translation: 被测器件(DUT)的端子通过一系列导电引脚对临时电连接到负载板上的相应接触焊盘。 销对通过中间层膜保持在适当的位置,其中顶部面向被测器件,面向负载板的底部以及顶部和底部接触板之间的垂直弹性的非导电部件。 每个销对包括顶部和底部销,其分别延伸超过顶部和底部接触板,朝向被测设备和负载板。 底部销具有下接触表面,其包括弓形部分或脊,当DUT插入时,凸起部分或脊部增加接触压力并通过脊的摆动作用来消除氧化物。
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公开(公告)号:US10302675B2
公开(公告)日:2019-05-28
申请号:US16126750
申请日:2018-09-10
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
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公开(公告)号:US10073117B2
公开(公告)日:2018-09-11
申请号:US15619770
申请日:2017-06-12
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
CPC classification number: G01R1/06744 , G01R1/067 , G01R1/06738 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49117
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
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公开(公告)号:US20190004091A1
公开(公告)日:2019-01-03
申请号:US16126750
申请日:2018-09-10
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
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公开(公告)号:US20170315169A1
公开(公告)日:2017-11-02
申请号:US15654116
申请日:2017-07-19
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Patrick J. Alladio , Russell F. Oberg , Brian Warwick , Gary W. Michalko
CPC classification number: G01R31/2891 , G01R1/0416 , G01R1/06738 , G01R1/06744 , G01R1/0735 , G01R3/00 , G01R31/2887 , G01R31/2889 , H01R43/16 , Y10T29/49204
Abstract: The terminals of a device under test are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane that includes a top contact plate facing the device under test, a bottom contact plate facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The top and bottom pins contact each other at an interface that is inclined with respect to the membrane surface normal. When compressed longitudinally, the pins translate toward each other by sliding along the interface. The sliding is largely longitudinal, with a small and desirable lateral component determined by the inclination of the interface.
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公开(公告)号:US20170276699A1
公开(公告)日:2017-09-28
申请号:US15619770
申请日:2017-06-12
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
CPC classification number: G01R1/06744 , G01R1/067 , G01R1/06738 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49117
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
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公开(公告)号:US09678106B2
公开(公告)日:2017-06-13
申请号:US15082083
申请日:2016-03-28
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
CPC classification number: G01R1/06744 , G01R1/067 , G01R1/06738 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49117
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
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公开(公告)号:US09297832B2
公开(公告)日:2016-03-29
申请号:US14287557
申请日:2014-05-27
Applicant: Johnstech International Corporation
Inventor: John E. Nelson , Jeffrey C. Sherry , Brian Warwick , Gary W. Michalko
CPC classification number: G01R1/06744 , G01R1/067 , G01R1/06738 , G01R3/00 , G01R31/2887 , G01R31/2889 , Y10T29/49117
Abstract: The terminals of a device under test (DUT) are temporarily electrically connected to corresponding contact pads on a load board by a series of electrically conductive pin pairs. The pin pairs are held in place by an interposer membrane with a top facing the device under test, a bottom facing the load board, and a vertically resilient, non-conductive member between the top and bottom contact plates. Each pin pair includes a top and bottom pin, which extend beyond the top and bottom contact plates, respectively, toward the device under test and the load board, respectively. The bottom pins has a lower contact surface which includes an arcuate portion or ridge which increases contact pressure and ablates oxides by the rocking action of ridge when the DUT in inserted.
Abstract translation: 被测器件(DUT)的端子通过一系列导电引脚对临时电连接到负载板上的相应接触焊盘。 销对通过中间层膜保持在适当的位置,其中顶部面向被测器件,面向负载板的底部以及顶部和底部接触板之间的垂直弹性的非导电部件。 每个销对包括顶部和底部销,其分别延伸超过顶部和底部接触板,朝向被测设备和负载板。 底部销具有下接触表面,其包括弓形部分或脊,当DUT插入时,凸起部分或脊部增加接触压力并通过脊的摆动作用来消除氧化物。
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