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公开(公告)号：US07579615B2
公开(公告)日：2009-08-25
申请号：US11199251
申请日：2005-08-09
Applicant: Jon Daley , Kristy A. Campbell , Joseph F. Brooks
Inventor： Jon Daley , Kristy A. Campbell , Joseph F. Brooks
IPC: H01L45/00
CPC classification number: H01L27/101 , H01L27/2454 , H01L27/2472 , H01L29/66666 , H01L29/7827 , H01L45/085 , H01L45/1233 , H01L45/143
Abstract: An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element.
Abstract translation: 提供了一种用于电阻可变存储元件的存取晶体管及其形成方法。 存取晶体管具有第一和第二源/漏区和垂直堆叠在衬底上的沟道区。 存取晶体管与至少一个电阻可变存储元件相关联。
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公开(公告)号：US07289349B2
公开(公告)日：2007-10-30
申请号：US11601747
申请日：2006-11-20
Applicant: Kristy A. Campbell , Jon Daley , Joseph F. Brooks
Inventor： Kristy A. Campbell , Jon Daley , Joseph F. Brooks
IPC: G11C7/00
CPC classification number: G11C13/003 , G11C13/0011 , G11C13/0033 , G11C13/0069 , G11C16/3431 , G11C2013/009 , G11C2213/72 , G11C2213/76
Abstract: A memory device having a memory portion connected in series with a threshold device between. The memory portion stores at least one bit of data based on at least two resistance states. The threshold device is configured to switch from a high resistance state to a low resistance state upon application of a voltage and, when the voltage is removed, to re-assume the high resistance state. Additionally, the threshold device can be configured to switch in response to both negative and positive applied voltages across the first and second electrodes. Memory elements having a memory portion and threshold device between first and second electrodes and methods for forming the memory elements are also provided.
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公开(公告)号：US07663133B2
公开(公告)日：2010-02-16
申请号：US11599471
申请日：2006-11-15
Applicant: Jon Daley , Joseph F. Brooks
Inventor： Jon Daley , Joseph F. Brooks
IPC: H01L21/8242
CPC classification number: H01L27/24
Abstract: A memory element having a resistance variable material and methods for forming the same are provided. The method includes forming a plurality of first electrodes over a substrate and forming a blanket material stack over the first electrodes. The stack includes a plurality of layers, at least one layer of the stack includes a resistance variable material. The method also includes forming a first conductive layer on the stack and etching the conductive layer and at least one of the layers of the stack to form a first pattern of material stacks. The etched first conductive layer forming a plurality of second electrodes with a portion of the resistance variable material located between each of the first and second electrodes.
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4.发明授权Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication 有权具有溅射金属硫族化物区域的电阻可变存储器件及其制造方法公开(公告)号：US07274034B2
公开(公告)日：2007-09-25
申请号：US11193425
申请日：2005-08-01
Applicant: Kristy A. Campbell , Jon Daley , Joseph F. Brooks
Inventor： Kristy A. Campbell , Jon Daley , Joseph F. Brooks
CPC classification number: H01L45/1675 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers.
Abstract translation: 一种基于硫族化物的可编程导体存储器件和形成该器件的方法，其中硫族化物玻璃区域具有多个交替的锡硫族化物和与其接近的金属层。 形成该器件的方法包括溅射交替的锡硫族化物和金属层。
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5.发明申请RESISTANCE VARIABLE MEMORY DEVICE WITH SPUTTERED METAL-CHALCOGENIDE REGION AND METHOD OF FABRICATION 有权具有溅射金属 - 氯化镓区域的电阻可变存储器件和制造方法公开(公告)号：US20100171088A1
公开(公告)日：2010-07-08
申请号：US12725066
申请日：2010-03-16
Applicant: Kristy A. Campbell , Jon Daley , Joseph F. Brooks
Inventor： Kristy A. Campbell , Jon Daley , Joseph F. Brooks
CPC classification number: H01L45/1675 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers.
Abstract translation: 一种基于硫族化物的可编程导体存储器件和形成该器件的方法，其中硫族化物玻璃区域具有多个交替的锡硫族化物和与其接近的金属层。 形成该器件的方法包括溅射交替的锡硫族化物和金属层。
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Patent Agency Ranking
6.发明授权Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication 有权具有溅射金属硫族化物区域的电阻可变存储器件及其制造方法公开(公告)号：US07940556B2
公开(公告)日：2011-05-10
申请号：US12725066
申请日：2010-03-16
Applicant: Kristy A. Campbell , Jon Daley , Joseph F. Brooks
Inventor： Kristy A. Campbell , Jon Daley , Joseph F. Brooks
IPC: G11C11/00
CPC classification number: H01L45/1675 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers.
Abstract translation: 一种基于硫族化物的可编程导体存储器件和形成该器件的方法，其中硫族化物玻璃区域具有多个交替的锡硫族化物和与其接近的金属层。 形成该器件的方法包括溅射交替的锡硫族化物和金属层。
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公开(公告)号：US07709885B2
公开(公告)日：2010-05-04
申请号：US11705439
申请日：2007-02-13
Applicant: Jon Daley , Kristy A. Campbell , Joseph F. Brooks
Inventor： Jon Daley , Kristy A. Campbell , Joseph F. Brooks
IPC: H01L29/78
CPC classification number: H01L27/101 , H01L27/2454 , H01L27/2472 , H01L29/66666 , H01L29/7827 , H01L45/085 , H01L45/1233 , H01L45/143
Abstract: An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element.
Abstract translation: 提供了一种用于电阻可变存储元件的存取晶体管及其形成方法。 存取晶体管具有第一和第二源/漏区和垂直堆叠在衬底上的沟道区。 存取晶体管与至少一个电阻可变存储元件相关联。
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8.发明授权Resistance variable memory device with sputtered metal-chalcogenide region and method of fabrication 有权具有溅射金属硫族化物区域的电阻可变存储器件及其制造方法公开(公告)号：US07701760B2
公开(公告)日：2010-04-20
申请号：US12232232
申请日：2008-09-12
Applicant: Kristy A. Campbell , Jon Daley , Joseph F. Brooks
Inventor： Kristy A. Campbell , Jon Daley , Joseph F. Brooks
IPC: G11C11/00
CPC classification number: H01L45/1675 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1625
Abstract: A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a chalcogenide glass region is provided with a plurality of alternating tin chalcogenide and metal layers proximate thereto. The method of forming the device comprises sputtering the alternating tin chalcogenide and metal layers.
Abstract translation: 一种基于硫族化物的可编程导体存储器件和形成该器件的方法，其中硫族化物玻璃区域具有多个交替的锡硫族化物和与其接近的金属层。 形成该器件的方法包括溅射交替的锡硫族化物和金属层。
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公开(公告)号：US08652903B2
公开(公告)日：2014-02-18
申请号：US12730611
申请日：2010-03-24
Applicant: Jon Daley , Kristy A. Campbell , Joseph F. Brooks
Inventor： Jon Daley , Kristy A. Campbell , Joseph F. Brooks
IPC: H01L21/8239
CPC classification number: H01L27/101 , H01L27/2454 , H01L27/2472 , H01L29/66666 , H01L29/7827 , H01L45/085 , H01L45/1233 , H01L45/143
Abstract: An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element.
Abstract translation: 提供了一种用于电阻可变存储元件的存取晶体管及其形成方法。 存取晶体管具有第一和第二源/漏区和垂直堆叠在衬底上的沟道区。 存取晶体管与至少一个电阻可变存储元件相关联。
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公开(公告)号：US20100178741A1
公开(公告)日：2010-07-15
申请号：US12730611
申请日：2010-03-24
Applicant: Jon Daley , Kristy A. Campbell , Joseph F. Brooks
Inventor： Jon Daley , Kristy A. Campbell , Joseph F. Brooks
IPC: H01L21/8239
CPC classification number: H01L27/101 , H01L27/2454 , H01L27/2472 , H01L29/66666 , H01L29/7827 , H01L45/085 , H01L45/1233 , H01L45/143
Abstract: An access transistor for a resistance variable memory element and methods of forming the same are provided. The access transistor has first and second source/drain regions and a channel region vertically stacked over the substrate. The access transistor is associated with at least one resistance variable memory element.
Abstract translation: 提供了一种用于电阻可变存储元件的存取晶体管及其形成方法。 存取晶体管具有第一和第二源/漏区和垂直堆叠在衬底上的沟道区。 存取晶体管与至少一个电阻可变存储元件相关联。
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