Shoe based force sensor and equipment for use with the same
    1.
    发明授权
    Shoe based force sensor and equipment for use with the same 失效
    鞋基力传感器和使用的设备相同

    公开(公告)号:US06807869B2

    公开(公告)日:2004-10-26

    申请号:US10304104

    申请日:2002-11-25

    IPC分类号: G01L300

    摘要: A sensor for detecting the presence of a force exerted by a persons foot on the ground is provided in a shoe, the sensor interposed between the foot and the ground in the region of the sole of the shoe. The sensor includes a resilient compressible elastomeric middle layer of insulating material disposed between a lower conductive fabric layer and a plurality of upper conductive fabric layer portions. The resilient elastomeric layer includes a plurality of embedded electrically conductive metal filaments extending from a first surface towards a second surface of the elastomeric layer. In regions of the sensor compressed by force ‘F’ due to a persons weight the thickness of the elastomeric layer is reduced and so the metal filaments are of sufficient length to provide electrical continuity through the elastomeric layer between the lower and upper conductive fabric. The occurrence of such continuity is monitored and processed by a system to provide data for use in the field of sports training and athlete monitoring applications.

    摘要翻译: 用于检测由人脚施加在地面上的力的传感器设置在鞋中,传感器插入在鞋底中的脚与地面之间。 传感器包括设置在下导电织物层和多个上导电织物层部分之间的可弹性的可压缩弹性体中间层绝缘材料。 弹性弹性体层包括从弹性体层的第一表面延伸到第二表面的多个嵌入的导电金属细丝。 在传感器压缩的传感器的区域中,由于人的重量,弹性体层的厚度减小,因此金属丝具有足够的长度,以通过下导电织物和上导电织物之间的弹性体层提供电连续性。 这种连续性的发生由系统监测和处理,以提供用于运动训练和运动员监视应用领域的数据。

    Design-based reticle defect prioritization
    2.
    发明授权
    Design-based reticle defect prioritization 有权
    基于设计的掩模版缺陷优先级

    公开(公告)号:US06778695B1

    公开(公告)日:2004-08-17

    申请号:US09471529

    申请日:1999-12-23

    IPC分类号: G06K900

    CPC分类号: G01R31/311

    摘要: Design-based reticle inspection allows for a more efficient prioritization than typical human labor intensive reticle inspection techniques. A processed netlist for an integrated circuit (IC) and/or layout of the IC is used to determine the relative priorities of reticle defects identified by a reticle inspection device. In one embodiment, the processed netlist is a netlist that is derived by a verification tool based on a layout of the IC design. The processed netlist can include component coordinates that indicate the position of the components of the IC. In one embodiment, the processed layout includes derived geometry, for example, critical dimensions and/or device identifications that can be used to determine regions of interest. In one embodiment, defects are prioritized based on the location of the defects with respect to functional portions of the integrated circuit. For example, regions of interest can be determined around certain IC structures (e.g., transistor gates, minimum dimension lines, line corners). In one embodiment, defects within the regions of interest can be repaired while defects outside of the care zone can be ignored. More complex defect prioritization can be provided by prioritizing defects, for example, by size within the regions of interest. By prioritizing defects by areas of interest, the number of defects analyzed by a human operator and/or simulator can be decreased thereby decreasing the cost of reticle inspection and repair.

    摘要翻译: 基于设计的掩模版检查可以比典型的人力密集型掩模版检查技术更有效地确定优先级。 用于IC的集成电路(IC)和/或布局的处理网表用于确定由掩模版检查装置识别的掩模版缺陷的相对优先级。 在一个实施例中,经处理的网表是基于IC设计的布局由验证工具导出的网表。 经处理的网表可以包括指示IC的组件的位置的组件坐标。 在一个实施例中,经处理的布局包括导出的几何形状,例如可用于确定感兴趣区域的关键尺寸和/或设备标识。 在一个实施例中,基于缺陷相对于集成电路的功能部分的位置优先考虑缺陷。 例如,可以围绕某些IC结构(例如,晶体管栅极,最小尺寸线,线角)来确定感兴趣的区域。 在一个实施例中,可以修复感兴趣区域内的缺陷,同时可以忽略护理区外的缺陷。 可以通过对缺陷进行优先排序来提供更复杂的缺陷优先级,例如按照感兴趣区域内的大小。 通过将感兴趣区域的缺陷设定为优先级,可以减少由操作人员和/或模拟器分析的缺陷的数量,从而降低掩模版检查和修复的成本。

    Saturable smoothing grid for image processing
    3.
    发明授权
    Saturable smoothing grid for image processing 失效
    用于图像处理的饱和平滑网格

    公开(公告)号:US5294989A

    公开(公告)日:1994-03-15

    申请号:US761427

    申请日:1991-09-17

    CPC分类号: H04N9/646 H04N5/21

    摘要: An image processing technique in which illumination effects are reduced by subtraction of spatially weighted masks which are formed substantially simultaneously on an analog smoothing grid. Haloing are reduced by using a mask whose spatial weighting is non-linear at the boundary of image segments whose intensities differ by more than would be predicted by the Rule of Twenty which predicts that the ratio of naturally found reflectances seldom exceeds a factor of twenty. A color image is processed by forming differently scaled masks, each of which is related to a spectral component of the original image. The masks are subtracted from the image to form a composite image. The saturation level in each smoothing grid is selected to minimize adverse effects of illumination in that spectral component by causing segmentation of image areas whose intensity differences exceed natural reflectance ratios. The transfer functions of each grid may also separately adjusted to enhance the composite image.

    摘要翻译: 一种图像处理技术,其中通过减去基本上同时形成在模拟平滑栅格上的空间加权掩模来减少照明效果。 通过使用掩模,其空间加权在图像段的边界处是非线性的掩模,其强度相差超过“规则二十”预测的预测,其自然发现的反射率很少超过二十倍。 通过形成不同比例缩放的掩模来处理彩色图像,每个掩码与原始图像的光谱分量相关。 从图像中减去掩模以形成合成图像。 选择每个平滑网格中的饱和度水平,以通过对强度差超过自然反射率的图像区域进行分割来最小化该光谱分量中的照明的不利影响。 每个网格的传递函数也可以单独调整以增强合成图像。

    Mask Patterns for Use in Multiple-Exposure Lithography
    4.
    发明申请
    Mask Patterns for Use in Multiple-Exposure Lithography 有权
    在多曝光光刻中使用的面膜图案

    公开(公告)号:US20090319978A1

    公开(公告)日:2009-12-24

    申请号:US12423686

    申请日:2009-04-14

    IPC分类号: G06F17/50

    CPC分类号: G03F7/70466 G03F1/70

    摘要: A method for determining mask patterns to be used on photo-masks in a multiple-exposure photolithographic process is described. During the method, an initial mask pattern, which is intended for use in a single-exposure photolithographic process, and a target pattern that is to be printed are used to determine a first mask pattern and a second mask pattern, which are intended for use in the multiple-exposure photolithographic process. In particular, the first mask pattern includes a first feature and the second mask pattern includes a second feature, and the first feature and the second feature overlap an intersection between features in the initial mask pattern. Moreover, the first mask pattern and the second mask pattern have at least one decreased spatial frequency relative to the initial mask pattern along at least one direction in the initial mask pattern.

    摘要翻译: 描述了一种用于确定在多曝光光刻工艺中用于光掩模的掩模图案的方法。 在该方法期间,用于单曝光光刻工艺中使用的初始掩模图案和待印刷的目标图案用于确定预期使用的第一掩模图案和第二掩模图案 在多曝光光刻工艺中。 特别地,第一掩模图案包括第一特征,第二掩模图案包括第二特征,并且第一特征和第二特征与初始掩模图案中的特征之间的交点重叠。 此外,第一掩模图案和第二掩模图案在初始掩模图案中沿着至少一个方向具有相对于初始掩模图案的至少一个减小的空间频率。

    Method and apparatus for affixing an optic fiber tip in position with
respect to a fiber communications circuit
    5.
    发明授权
    Method and apparatus for affixing an optic fiber tip in position with respect to a fiber communications circuit 失效
    用于将光纤尖端相对于光纤通信电路固定在适当位置的方法和装置

    公开(公告)号:US5301251A

    公开(公告)日:1994-04-05

    申请号:US990899

    申请日:1992-12-15

    IPC分类号: G02B6/255 G02B6/36 G02B6/42

    摘要: The invention disclosed includes both a method and apparatus for affixing an optic fiber tip in position with respect to a fiber communications circuit. In one embodiment of the method, a glass positioning member is located proximate the tip of the optic fiber. In another step, the glass positioning member is affixed to the fiber at a first position with respect to the fiber tip. The glass positioning member is also affixed in a second position with respect to the carrier. In a more detailed embodiment, the method of the present invention includes positioning the optic fiber through a channel of the glass positioning member. Heat is applied to the glass positioning member causing it to soften such that its channel collapses around and fuses to the fiber. In still further detail, the fused positioning member/fiber are affixed to a block, and the block is fused to a carrier. Alignment steps are taken during the fusing steps to locate the tip of the fiber in the desired position relative to the fiber communications circuitry.

    摘要翻译: 所公开的发明包括用于将光纤尖端相对于光纤通信电路固定在适当位置的方法和装置。 在该方法的一个实施例中,玻璃定位构件位于光纤末端附近。 在另一步骤中,玻璃定位构件相对于纤维头在第一位置固定到纤维上。 玻璃定位构件也相对于载体固定在第二位置。 在更详细的实施例中,本发明的方法包括通过玻璃定位构件的通道定位光纤。 将热量施加到玻璃定位构件上,导致其软化,使得其通道围绕并熔化到纤维。 更进一步的细节是,熔接的定位件/纤维固定在一个块上,该块被熔合到一个载体上。 在定影步骤期间采取对准步骤,以将光纤的尖端相对于光纤通信电路定位在期望的位置。

    Mask patterns for use in multiple-exposure lithography
    6.
    发明授权
    Mask patterns for use in multiple-exposure lithography 有权
    用于多曝光光刻的掩模图案

    公开(公告)号:US08082524B2

    公开(公告)日:2011-12-20

    申请号:US12423686

    申请日:2009-04-14

    IPC分类号: G06F17/50

    CPC分类号: G03F7/70466 G03F1/70

    摘要: A method for determining mask patterns to be used on photo-masks in a multiple-exposure photolithographic process is described. During the method, an initial mask pattern, which is intended for use in a single-exposure photolithographic process, and a target pattern that is to be printed are used to determine a first mask pattern and a second mask pattern, which are intended for use in the multiple-exposure photolithographic process. In particular, the first mask pattern includes a first feature and the second mask pattern includes a second feature, and the first feature and the second feature overlap an intersection between features in the initial mask pattern. Moreover, the first mask pattern and the second mask pattern have at least one decreased spatial frequency relative to the initial mask pattern along at least one direction in the initial mask pattern.

    摘要翻译: 描述了一种用于确定在多曝光光刻工艺中用于光掩模的掩模图案的方法。 在该方法期间,用于单曝光光刻工艺中使用的初始掩模图案和待印刷的目标图案用于确定预期使用的第一掩模图案和第二掩模图案 在多曝光光刻工艺中。 特别地,第一掩模图案包括第一特征,第二掩模图案包括第二特征,并且第一特征和第二特征与初始掩模图案中的特征之间的交点重叠。 此外,第一掩模图案和第二掩模图案在初始掩模图案中沿着至少一个方向具有相对于初始掩模图案的至少一个减小的空间频率。

    Hybrid sensor pixel architecture
    7.
    发明授权
    Hybrid sensor pixel architecture 失效
    混合传感器像素架构

    公开(公告)号:US6031248A

    公开(公告)日:2000-02-29

    申请号:US67657

    申请日:1998-04-28

    CPC分类号: H01L27/14609 H01L27/14643

    摘要: A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein.

    摘要翻译: 用于图像感测的像素电路结构包括光电传感器,放大器,选择器开关和复位开关。 放大器可以是用于高增益的单个多晶硅(沟道)晶体管。 选择器开关也可以是用于高导电性的单个多晶硅(沟道)晶体管。 复位开关可以是用于低漏电流的单个非晶态硅(沟道)晶体管。 光传感器和放大器可以连接到共享偏置线,或者可以分别连接到单独的偏置线和驱动线。 选择器和复位开关可以连接到共享数据线,或者可以分别连接到单独的数据和复位线。 激光结晶和再氢化技术非常适合于获得本文所述的装置。

    PLANT PRODUCTION FACILITY AND PROCESS

    公开(公告)号:US20230085622A1

    公开(公告)日:2023-03-23

    申请号:US17802691

    申请日:2021-02-26

    IPC分类号: A01G9/28 A01G9/24

    摘要: Described herein are methods of producing plant products and plant production facilities equipped to produce the same on a large-scale. The methods and facilities provide for sprouting directly on a solid growing surface with embedded temperature control, which maximizes independent control of each batch of sprouts or plant products. The embedded temperature control system generally comprises one or more heat transfer conduits for flowing a heat transfer fluid therethrough. A seed spreader device may be used to deposit a bed of plant seeds at a substantially uniform height across the growing surfaces. Advantageously, the simplified design is more cost-effective and can be easily understood, used, and repaired by the average farmer or livestock operator.

    Hybrid sensor pixel architecture with threshold response
    9.
    发明授权
    Hybrid sensor pixel architecture with threshold response 失效
    具有阈值响应的混合传感器像素结构

    公开(公告)号:US6051827A

    公开(公告)日:2000-04-18

    申请号:US67941

    申请日:1998-04-28

    IPC分类号: H01L27/146 H01J40/14

    CPC分类号: H01L27/14609

    摘要: A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein. Threshold response is provided.

    摘要翻译: 用于图像感测的像素电路结构包括光电传感器,放大器,选择器开关和复位开关。 放大器可以是用于高增益的单个多晶硅(沟道)晶体管。 选择器开关也可以是用于高导电性的单个多晶硅(沟道)晶体管。 复位开关可以是用于低漏电流的单个非晶态硅(沟道)晶体管。 光传感器和放大器可以连接到共享偏置线,或者可以分别连接到单独的偏置线和驱动线。 选择器和复位开关可以连接到共享数据线,或者可以分别连接到单独的数据和复位线。 激光结晶和再氢化技术非常适合于获得本文所述的装置。 提供阈值响应。

    Passively aligned opto-electronic coupling assembly
    10.
    发明授权
    Passively aligned opto-electronic coupling assembly 失效
    被动对准的光电耦合组件

    公开(公告)号:US6015239A

    公开(公告)日:2000-01-18

    申请号:US63122

    申请日:1998-04-20

    申请人: Andrew J. Moore

    发明人: Andrew J. Moore

    IPC分类号: G02B6/42 G02B6/255

    摘要: There is disclosed herein an opto-electronic coupling assembly for optically coupling a light active area of an active device with an end face that is disposed at one end of an elongated light guide such that light is coupled between the end face of the light guide and the light active area of the active device. The coupling assembly includes a light guide end housing that defines a housing outline and which is adapted to support the end of the light guide including its end face. The opto-electronic coupling assembly further includes an active device package which itself includes an arrangement for supporting the active device and for providing external electrical connections to the active device. An encapsulant material surrounds the active device and at least partially surrounds the support arrangement. The encapsulant material is substantially optically transparent to the coupled light and is molded in a predetermined configuration which cooperates with the housing outline of the light guide end housing in a way that passively places the light active area of the active device into substantial optical alignment with the end face of the light guide when the light guide end housing is assembled with the active device package. In one alternative, the assembly may be configured for coupling an array of light guides with a corresponding array of individual and/or integrated active devices which are positioned in the active device package. In another alternative, the active device package may include different types of active devices arranged in a predetermined way relative to one or more light guides.

    摘要翻译: 这里公开了一种光电耦合组件,用于将有源器件的光有源区域与设置在细长导光体的一端处的端面光学耦合,使得光耦合在光导的端面和 有源器件的有源区域。 联接组件包括限定壳体轮廓并且适于支撑包括其端面的光导的端部的光导端壳体。 光电耦合组件还包括有源器件封装,其自身包括用于支撑有源器件并用于提供与有源器件的外部电连接的装置。 密封剂材料围绕有源器件并且至少部分地围绕支撑装置。 密封剂材料对于耦合的光基本上是光学透明的,并且被模制成预定的构型,其与导光端壳体的外壳轮廓配合,以被动方式将有源器件的光有源区域与 当导光端壳体与有源器件封装组装时,光导的端面。 在一个替代方案中,组件可以被配置为将光导阵列与定位在有源器件封装中的单个和/或集成有源器件的对应阵列耦合。 在另一替代方案中,有源器件封装可以包括相对于一个或多个光导以预定方式布置的不同类型的有源器件。