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公开(公告)号:US08557621B2
公开(公告)日:2013-10-15
申请号:US13157806
申请日:2011-06-10
申请人: Jong-Hyun Choung , Yang Ho Bae , Jean Ho Song , O Sung Seo , Sun-Young Hong , Hwa Yeul Oh , Bong-Kyun Kim , Nam Seok Suh , Dong-Ju Yang , Wang Woo Lee
发明人: Jong-Hyun Choung , Yang Ho Bae , Jean Ho Song , O Sung Seo , Sun-Young Hong , Hwa Yeul Oh , Bong-Kyun Kim , Nam Seok Suh , Dong-Ju Yang , Wang Woo Lee
IPC分类号: H01L21/00
CPC分类号: H01L21/32134 , G02F1/136227 , H01L27/1288 , H01L29/41733
摘要: A method for manufacturing a thin film transistor array panel, including: sequentially forming a first silicon layer, a second silicon layer, a lower metal layer, and an upper metal layer on a gate insulating layer and a gate line; forming a first film pattern on the upper metal layer; forming a first lower metal pattern and a first upper metal pattern that includes a protrusion, by etching the upper metal layer and the lower metal layer; forming first and second silicon patterns by etching the first and second silicon layers; forming a second film pattern by ashing the first film pattern; forming a second upper metal pattern by etching the first upper metal pattern; forming a data line and a thin film transistor by etching the first lower metal pattern and the first and second silicon patterns; and forming a passivation layer and a pixel electrode on the resultant.
摘要翻译: 一种制造薄膜晶体管阵列面板的方法,包括:在栅绝缘层和栅极线上依次形成第一硅层,第二硅层,下金属层和上金属层; 在上金属层上形成第一膜图案; 通过蚀刻上金属层和下金属层,形成第一下金属图案和包括突起的第一上金属图案; 通过蚀刻第一和第二硅层形成第一和第二硅图案; 通过灰化第一膜图案形成第二膜图案; 通过蚀刻第一上金属图案形成第二上金属图案; 通过蚀刻第一下金属图案和第一和第二硅图案来形成数据线和薄膜晶体管; 并在所得物上形成钝化层和像素电极。
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公开(公告)号:US20120273787A1
公开(公告)日:2012-11-01
申请号:US13244086
申请日:2011-09-23
申请人: Hwa Yeul OH , O Sung Seo , Je Hyeong Park , Shin II Choi , Dong-Won Woo , Ji-Young Park , Jean Ho Song , Sang Gab Kim
发明人: Hwa Yeul OH , O Sung Seo , Je Hyeong Park , Shin II Choi , Dong-Won Woo , Ji-Young Park , Jean Ho Song , Sang Gab Kim
IPC分类号: H01L33/08 , H01L21/336
CPC分类号: H01L27/1259 , G02F1/136286
摘要: In a thin film transistor array panel according to an exemplary embodiment of the present invention, a plasma process using a mixed gas including hydrogen gas and nitrogen gas with a ratio of a predetermined value is undertaken before depositing a passivation layer. In this manner, performance deterioration of the thin film transistor may be prevented and simultaneously, haze in a transparent electrode may be prevented. Alternatively, a first passivation layer is depsoited, then removed. A passivation layer is again re-deposited, such that little or no haze is present in the resulting passivation layer.
摘要翻译: 在根据本发明的示例性实施例的薄膜晶体管阵列面板中,在沉积钝化层之前进行使用包括氢气和含有预定值的氮气的混合气体的等离子体处理。 以这种方式,可以防止薄膜晶体管的性能恶化,并且同时可以防止透明电极中的雾度。 或者,第一钝化层被剥离,然后除去。 再次沉积钝化层,使得在所得钝化层中存在很少或没有雾度。
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