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公开(公告)号:US08143952B2
公开(公告)日:2012-03-27
申请号:US12576033
申请日:2009-10-08
申请人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
发明人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
IPC分类号: H03F3/14
CPC分类号: H01L28/10 , H01F17/0013 , H01F19/04 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L27/0207 , H01L2224/16145 , H01L2924/3011
摘要: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.
摘要翻译: 公开了三维片上电感器,变压器和射频放大器。 射频放大器包括一对变压器和晶体管。 变压器包括至少两个电感耦合电感器。 电感器包括第一金属层的多个段,第二金属层的多个段,第一电感器输入端,第二电感器输入端和耦合第一金属层的多个段的多个穿通硅通孔 以及第二金属层的多个段,以在第一电感器输入端和第二电感器输入端之间形成连续的,不相交的路径。 电感器可以具有对称或不对称的几何形状。 第一金属层可以是芯片的后端部分中的金属层。 第二金属层可以位于芯片的再分布设计层中。
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2.
公开(公告)号:US20120056680A1
公开(公告)日:2012-03-08
申请号:US13294351
申请日:2011-11-11
申请人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
发明人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
IPC分类号: H03F3/16
CPC分类号: H01L28/10 , H01F17/0013 , H01F19/04 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L27/0207 , H01L2224/16145 , H01L2924/3011
摘要: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.
摘要翻译: 公开了一种三维片上射频放大器,其包括第一和第二变压器和第一晶体管。 第一变压器包括第一和第二电感耦合电感器。 第二变压器包括第三和第四电感耦合电感器。 每个电感器包括在第一金属层中的多个第一段; 第二金属层中的多个第二段; 第一和第二输入以及耦合第一和第二段的多通孔,以形成第一和第二输入之间的连续路径。 第一电感器的第一输入耦合到放大器输入端; 第二电感器的第一输入耦合到第一晶体管栅极; 第三电感器的第一输入耦合到第一晶体管漏极,第四电感器的第一输入耦合到放大器输出端。 第二电感器输入和第一晶体管源耦合到地。
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3.
公开(公告)号:US08508301B2
公开(公告)日:2013-08-13
申请号:US13294351
申请日:2011-11-11
申请人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
发明人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
IPC分类号: H03F3/14
CPC分类号: H01L28/10 , H01F17/0013 , H01F19/04 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L27/0207 , H01L2224/16145 , H01L2924/3011
摘要: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.
摘要翻译: 公开了一种三维片上射频放大器,其包括第一和第二变压器和第一晶体管。 第一变压器包括第一和第二电感耦合电感器。 第二变压器包括第三和第四电感耦合电感器。 每个电感器包括在第一金属层中的多个第一段; 第二金属层中的多个第二段; 第一和第二输入以及耦合第一和第二段的多通孔,以形成第一和第二输入之间的连续路径。 第一电感器的第一输入耦合到放大器输入端; 第二电感器的第一输入耦合到第一晶体管栅极; 第三电感器的第一输入耦合到第一晶体管漏极,第四电感器的第一输入耦合到放大器输出端。 第二电感器输入和第一晶体管源耦合到地。
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公开(公告)号:US20110084765A1
公开(公告)日:2011-04-14
申请号:US12576033
申请日:2009-10-08
申请人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
发明人: Jonghae Kim , Shiqun Gu , Brian Matthew Henderson , Thomas R. Toms , Lew G. Chua-Eoan , Seyfollah S. Bazarjani , Matthew Nowak
CPC分类号: H01L28/10 , H01F17/0013 , H01F19/04 , H01F2017/002 , H01L23/481 , H01L23/5227 , H01L27/0207 , H01L2224/16145 , H01L2924/3011
摘要: A three dimensional on-chip inductor, transformer and radio frequency amplifier are disclosed. The radio frequency amplifier includes a pair of transformers and a transistor. The transformers include at least two inductively coupled inductors. The inductors include a plurality of segments of a first metal layer, a plurality of segments of a second metal layer, a first inductor input, a second inductor input, and a plurality of through silicon vias coupling the plurality of segments of the first metal layer and the plurality of segments of the second metal layer to form a continuous, non-intersecting path between the first inductor input and the second inductor input. The inductors can have a symmetric or asymmetric geometry. The first metal layer can be a metal layer in the back-end-of-line section of the chip. The second metal layer can be located in the redistributed design layer of the chip.
摘要翻译: 公开了三维片上电感器,变压器和射频放大器。 射频放大器包括一对变压器和晶体管。 变压器包括至少两个电感耦合电感器。 电感器包括第一金属层的多个段,第二金属层的多个段,第一电感器输入端,第二电感器输入端和耦合第一金属层的多个段的多个穿通硅通孔 以及第二金属层的多个段,以在第一电感器输入端和第二电感器输入端之间形成连续的,不相交的路径。 电感器可以具有对称或不对称的几何形状。 第一金属层可以是芯片的后端部分中的金属层。 第二金属层可以位于芯片的再分布设计层中。
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5.
公开(公告)号:US20120001297A1
公开(公告)日:2012-01-05
申请号:US13231084
申请日:2011-09-13
IPC分类号: H01L27/06
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal layer in electrical communication with the active layer. The passive device can electrically couple to the active layer with through silicon vias (TSVs).
摘要翻译: 半导体管芯包括具有第一和第二侧面的半导体衬底层,与半导体衬底层的第二侧相邻的金属层,在半导体衬底层的第一侧上的有源层中的一个或多个有源器件; 以及与有源层电连通的金属层中的无源器件。 无源器件可以通过硅通孔(TSV)电耦合到有源层。
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6.
公开(公告)号:US08350358B2
公开(公告)日:2013-01-08
申请号:US13231084
申请日:2011-09-13
IPC分类号: H01L29/00
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal layer in electrical communication with the active layer. The passive device can electrically couple to the active layer with through silicon vias (TSVs).
摘要翻译: 半导体管芯包括具有第一和第二侧面的半导体衬底层,与半导体衬底层的第二侧相邻的金属层,在半导体衬底层的第一侧上的有源层中的一个或多个有源器件; 以及与有源层电连通的金属层中的无源器件。 无源器件可以通过硅通孔(TSV)电耦合到有源层。
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7.
公开(公告)号:US20120040509A1
公开(公告)日:2012-02-16
申请号:US13279570
申请日:2011-10-24
IPC分类号: H01L21/02
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A method for manufacturing a semiconductor device includes fabricating an active layer on a first side of a semiconductor substrate. The method also includes fabricating a metal layer on a second side of the semiconductor substrate. The metal layer includes a passive device embedded within the metal layer. The passive device can electrically couple to the active layer with through vias.
摘要翻译: 一种制造半导体器件的方法包括在半导体衬底的第一侧上制造有源层。 该方法还包括在半导体衬底的第二侧上制造金属层。 金属层包括嵌入金属层内的无源器件。 无源器件可以通过通孔电耦合到有源层。
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8.
公开(公告)号:US08067816B2
公开(公告)日:2011-11-29
申请号:US12364844
申请日:2009-02-03
IPC分类号: H01L29/00
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal layer in electrical communication with the active layer. The passive device can electrically couple to the active layer with through silicon vias (TSVs).
摘要翻译: 半导体管芯包括具有第一和第二侧面的半导体衬底层,与半导体衬底层的第二侧相邻的金属层,在半导体衬底层的第一侧上的有源层中的一个或多个有源器件; 以及与有源层电连通的金属层中的无源器件。 无源器件可以通过硅通孔(TSV)电耦合到有源层。
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9.
公开(公告)号:US20100193905A1
公开(公告)日:2010-08-05
申请号:US12364844
申请日:2009-02-03
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A semiconductor die includes a semiconductive substrate layer with first and second sides, a metal layer adjacent the second side of the semiconductive substrate layer, one or more active devices in an active layer on the first side of the semiconductive substrate layer; and a passive device in the metal layer in electrical communication with the active layer. The passive device can electrically couple to the active layer with through silicon vias (TSVs).
摘要翻译: 半导体管芯包括具有第一和第二侧面的半导体衬底层,与半导体衬底层的第二侧相邻的金属层,在半导体衬底层的第一侧上的有源层中的一个或多个有源器件; 以及与有源层电连通的金属层中的无源器件。 无源器件可以通过硅通孔(TSV)电耦合到有源层。
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10.
公开(公告)号:US08324066B2
公开(公告)日:2012-12-04
申请号:US13279570
申请日:2011-10-24
IPC分类号: H01L21/20
CPC分类号: H01L27/0617 , H01L23/481 , H01L23/5223 , H01L23/5227 , H01L27/0688 , H01L28/10 , H01L28/40 , H01L2924/0002 , H01L2924/00
摘要: A method for manufacturing a semiconductor device includes fabricating an active layer on a first side of a semiconductor substrate. The method also includes fabricating a metal layer on a second side of the semiconductor substrate. The metal layer includes a passive device embedded within the metal layer. The passive device can electrically couple to the active layer with through vias.
摘要翻译: 一种制造半导体器件的方法包括在半导体衬底的第一侧上制造有源层。 该方法还包括在半导体衬底的第二侧上制造金属层。 金属层包括嵌入金属层内的无源器件。 无源器件可以通过通孔电耦合到有源层。
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