公开(公告)号：US5677206A

公开(公告)日：1997-10-14

申请号：US605515

申请日：1996-02-26

申请人： Joo-Hyung Lee ,  Suk-Bum Mah ,  Jin-Hong Kim

发明人： Joo-Hyung Lee ,  Suk-Bum Mah ,  Jin-Hong Kim

IPC分类号： G02F1/136 ,  H01L21/336 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L29/66757 ,  H01L29/78621

摘要： A poly-silicon thin film transistor having LDD structure which has very low source/drain resistance is described. A TFT according to a preferred embodiment of the present invention, has, on a substrate, an active poly-silicon layer with a heavily-doped region on an outer peripheral thereof, a lightly doped region on ban inside the outer peripheral band and an un-doped region on a center part thereof. A gate insulating layer is comprised of a lower oxide layer, a nitride layer and an upper oxide layer. The lower oxide layer is formed over the whole active poly-silicon layer, but the nitride layer and the upper oxide layer are formed only on the un-doped portions of the active poly-silicon layer. A gate electrode is then formed on the upper oxide layer. A method for forming this structure is also described, which method uses a dry etch to remove the upper oxide layer and the nitride layer, but not the lower oxide layer prior to ion implantation of the active region.

摘要翻译： 描述了具有非常低的源极/漏极电阻的LDD结构的多晶硅薄膜晶体管。 根据本发明的优选实施例的TFT在衬底上具有在其外周上具有重掺杂区域的活性多晶硅层，在外周带上禁止的轻掺杂区域和un 在其中心部分的掺杂区域。 栅极绝缘层由低氧化物层，氮化物层和上部氧化物层组成。 在整个活性多晶硅层上形成低氧化物层，但仅在活性多晶硅层的未掺杂部分上形成氮化物层和上部氧化物层。 然后在上部氧化物层上形成栅电极。 还描述了用于形成该结构的方法，该方法使用干蚀刻在有源区的离子注入之前去除上氧化物层和氮化物层而不是下氧化物层。

公开(公告)号：US07683987B2

公开(公告)日：2010-03-23

申请号：US11209863

申请日：2005-08-24

申请人： Young-Chol Yang ,  Chong-Chul Chai ,  Jeong-Ye Choi ,  Jin-Oh Kwag ,  Jin-Hong Kim ,  Sang-Il Kim ,  Mun-Pyo Hong ,  Nam-Seok Roh

发明人： Young-Chol Yang ,  Chong-Chul Chai ,  Jeong-Ye Choi ,  Jin-Oh Kwag ,  Jin-Hong Kim ,  Sang-Il Kim ,  Mun-Pyo Hong ,  Nam-Seok Roh

IPC分类号： G02F1/1335 ,  G02F1/1343

CPC分类号： G02F1/133555 ,  G02F2001/134345 ,  G02F2001/134354

摘要： The present invention provides a TFT array panel having a transmissive region and a reflective region. A transmissive electrode is disposed in the transmissive region. The first reflective electrode connected to the transmissive electrode is disposed on the reflective region. The second reflective electrode separated from the transmissive electrode and the first reflective region is formed in the reflective region. A first conductor is connected to at least one of the transmissive electrode and the first reflective electrode. A second conductor is connected to the second reflective electrode. At least one of the transmissive electrode, the first reflective electrode and the first conductor overlaps at least one of the second reflective electrode and the second conductor.

摘要翻译： 本发明提供一种具有透射区域和反射区域的TFT阵列面板。 透射电极设置在透射区域中。 连接到透射电极的第一反射电极设置在反射区域上。 在反射区域中形成与透射电极和第一反射区域分离的第二反射电极。 第一导体与透射电极和第一反射电极中的至少一个连接。 第二导体连接到第二反射电极。 透射电极，第一反射电极和第一导体中的至少一个与第二反射电极和第二导体中的至少一个重叠。

公开(公告)号：US07675501B2

公开(公告)日：2010-03-09

申请号：US11013568

申请日：2004-12-16

申请人： Kyoung-Ju Shin ,  Chong-Chul Chai ,  Cheol-Woo Park ,  Sang-Il Kim ,  Jin-Hong Kim ,  Mun-Pyo Hong

发明人： Kyoung-Ju Shin ,  Chong-Chul Chai ,  Cheol-Woo Park ,  Sang-Il Kim ,  Jin-Hong Kim ,  Mun-Pyo Hong

IPC分类号： G09G3/36

CPC分类号： G09G3/3406 ,  G09G3/3688 ,  G09G2330/021 ,  G09G2360/144 ,  G09G2360/145

摘要： In a display apparatus, a light generating part generates a first light in response to a driving signal, and a first driving part outputs a panel driving signal. A display panel receives the first light from the light generating part and a second light externally provided, and displays an image in response to the panel driving signal. A light sensing part is disposed in the display panel so as to output a sensing signal corresponding a light amount of the second light. A second driving part compares the sensing signal with a predetermined reference value, and outputs a driving signal in accordance with the compared result. Thus, the display apparatus may reduce an electrical power consumed to drive the display apparatus.

摘要翻译： 在显示装置中，发光部根据驱动信号产生第一光，第一驱动部输出面板驱动信号。 显示面板接收来自发光部的第一光和外部设置的第二光，并响应于面板驱动信号显示图像。 光检测部件设置在显示面板中，以输出对应于第二光的光量的感测信号。 第二驱动部件将感测信号与预定参考值进行比较，并根据比较结果输出驱动信号。 因此，显示装置可以减少驱动显示装置所消耗的电力。

公开(公告)号：US07466302B2

公开(公告)日：2008-12-16

申请号：US10949068

申请日：2004-09-24

申请人： Jin-Hong Kim ,  Cheol-Woo Park ,  Chong-Chul Chai ,  Kyoung-Ju Shin

发明人： Jin-Hong Kim ,  Cheol-Woo Park ,  Chong-Chul Chai ,  Kyoung-Ju Shin

IPC分类号： G09G3/36

CPC分类号： G09G3/3406 ,  G09G3/3677 ,  G09G2320/0626 ,  G09G2330/021 ,  G09G2360/144

摘要： A light generating part generates a first light based on a first control signal. A first driving part outputs a panel driving signal. A display panel receives the first light or a second light that is provided from an exterior to display an image based on the panel driving signal. A sensing part outputs a sensing signal based on the second light. A second driving part compares a reference voltage range with the sensing signal to output the first control signal. The reference voltage range is determined by a first reference voltage and a second reference voltage. Therefore, the light generating part is turned on/off based on the second light to decrease the power consumption of the light generating part, and an operation of the light generating part is stabilized.

摘要翻译： 光产生部分基于第一控制信号产生第一光。 第一驱动部输出面板驱动信号。 显示面板接收从外部提供的第一光或第二光，以基于面板驱动信号显示图像。 感测部分输出基于第二光的感测信号。 第二驱动部件将参考电压范围与感测信号进行比较，以输出第一控制信号。 参考电压范围由第一参考电压和第二参考电压确定。 因此，基于第二光来导通/关闭发光部，以降低发光部的功耗，并且使光产生部的动作稳定。

公开(公告)号：US07460192B2

公开(公告)日：2008-12-02

申请号：US10954010

申请日：2004-09-29

申请人： Joon-Hak Oh ,  Chong-Chul Chai ,  Kyong-Ju Shin ,  Jin-Hong Kim ,  Sung-Jin Hong

发明人： Joon-Hak Oh ,  Chong-Chul Chai ,  Kyong-Ju Shin ,  Jin-Hong Kim ,  Sung-Jin Hong

IPC分类号： G02F1/136

CPC分类号： G02F1/1365 ,  G02F1/134363 ,  G02F1/13624 ,  G02F2201/124

摘要： A thin film diode panel comprises a pixel electrode formed on a substrate, the pixel electrode including a stem portion and a plurality of branch portions extended from the stem portion, and a data electrode line formed on the substrate, the data electrode line including a plurality of branch electrodes formed parallel to the plurality of branch portions. The plurality of branch portions may extend in a direction perpendicular to the stem portion and the plurality of branch electrodes may extend in a direction perpendicular to the data electrode line.

摘要翻译： 薄膜二极管面板包括形成在基板上的像素电极，所述像素电极包括主干部分和从所述主干部分延伸的多个分支部分，以及形成在所述基板上的数据电极线，所述数据电极线包括多个 的与多个分支部分平行的分支电极。 多个分支部分可以在垂直于茎部的方向上延伸，并且多个分支电极可以在垂直于数据电极线的方向上延伸。

公开(公告)号：US07041126B2

公开(公告)日：2006-05-09

申请号：US10653695

申请日：2003-09-02

申请人： Kyong-Min Shin ,  Jeong-Hee Nam ,  Jin-Hong Kim

发明人： Kyong-Min Shin ,  Jeong-Hee Nam ,  Jin-Hong Kim

IPC分类号： A61F2/06

CPC分类号： A61F2/90 ,  A61F2/07 ,  A61F2002/075

摘要： A flexible self-expandable stent has inside and outside stent bodies each fabricated by knitting first and second super-elastic shape memory alloy wires into a net-like structure with the first wire zigzagged with a diagonal length P interlocked with the second wire zigzagged with a diagonal length 2P at a plurality of interlocked points with intersecting points therebetween to allow the stent bodies to apply force against longitudinal contraction of the stent bodies. The interlocked points and the intersecting points form a plurality of diamond-shaped meshes in the net-like structure of each stent body. A hollow rubber tube is closely fitted between the inside and outside stent bodies, with each of the overlapped ends of the rubber tube and the stent bodies being integrating into a single structure.

摘要翻译： 柔性自扩张支架具有内侧和外侧的支架体，每个支架主体均通过将第一和第二超弹性形状记忆合金线编织为网状结构而制成，其中第一丝线以与第一丝线互锁的对角线长度P互锁， 在多个互锁点处的对角线长度2P，其间具有相交点，以允许支架体对支架体的纵向收缩施加力。 互锁点和相交点在每个支架主体的网状结构中形成多个菱形网。 中空橡胶管紧密地配合在内侧和外部支架体之间，橡胶管和支架体的每一个重叠的一端被集成为单个结构。

公开(公告)号：US20050231666A1

公开(公告)日：2005-10-20

申请号：US11105535

申请日：2005-04-14

申请人： Jin-Hong Kim ,  Sang-Il Kim ,  Chong-Chul Chai ,  Kyoung-Ju Shin ,  Mun-Pyo Hong ,  Sung-Jin Hong

发明人： Jin-Hong Kim ,  Sang-Il Kim ,  Chong-Chul Chai ,  Kyoung-Ju Shin ,  Mun-Pyo Hong ,  Sung-Jin Hong

IPC分类号： G02F1/1337 ,  G02F1/133 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  G09F9/30 ,  H01L29/786

CPC分类号： G02F1/133707 ,  G02F1/133555 ,  G02F1/134336

摘要： An array substrate comprises a pixel electrode and a reflective layer. The pixel electrode has an opening or a protrusion that make a plurality of LC domains when electric field is applied to the LC layer. The reflective layer is formed at the boundary of the LC domains. The plurality of the LC domains make the LCD have a wide viewing angle. The reflective layer make the domain boundary be a reflective mode of the LCD. The LCD can have a good display quality.

摘要翻译： 阵列基板包括像素电极和反射层。 像素电极具有当向LC层施加电场时形成多个LC域的开口或突起。 反射层形成在LC域的边界处。 多个LC域使LCD具有宽的视角。 反射层使域边界成为LCD的反射模式。 LCD可以具有良好的显示质量。

公开(公告)号：US06753221B2

公开(公告)日：2004-06-22

申请号：US10322274

申请日：2002-12-17

申请人： Jeong-Sic Jeon ,  Chang-Jin Kang ,  Seung-Young Son ,  Jin-Hong Kim

发明人： Jeong-Sic Jeon ,  Chang-Jin Kang ,  Seung-Young Son ,  Jin-Hong Kim

IPC分类号： H01L218242

CPC分类号： H01L27/10852 ,  H01L21/31116 ,  H01L21/32136 ,  H01L27/10894 ,  H01L28/55 ,  H01L28/91

摘要： Methods for fabricating semiconductor devices having capacitors are provided. A plurality of storage node electrodes are formed on a semiconductor substrate. Then, a capacitor dielectric layer is formed over the storage node electrodes. A plate electrode layer is subsequently formed on the capacitor dielectric layer. A hard mask layer is then formed on the resultant structure where the plate electrode layer is formed so as to fill a gap between the adjacent storage node electrodes. The hard mask layer and the plate electrode layer are successively patterned to form a plate electrode.

摘要翻译： 提供了制造具有电容器的半导体器件的方法。 多个存储节点电极形成在半导体衬底上。 然后，在存储节点电极上形成电容器电介质层。 随后在电容器电介质层上形成平板电极层。 然后在其上形成平板电极层的所得结构上形成硬掩模层，以填充相邻存储节点电极之间的间隙。 硬掩模层和平板电极层依次构图以形成平板电极。

公开(公告)号：US07995026B2

公开(公告)日：2011-08-09

申请号：US11243220

申请日：2005-10-04

申请人： Jin-Hong Kim ,  Beo-Deul Kang ,  Sung-Jin Hong ,  Kyoung-Ju Shin ,  Chong-Chul Chai

发明人： Jin-Hong Kim ,  Beo-Deul Kang ,  Sung-Jin Hong ,  Kyoung-Ju Shin ,  Chong-Chul Chai

IPC分类号： G09G3/36

CPC分类号： G09G3/3406 ,  G02F1/133555 ,  G02F2001/13312 ,  G09G2320/041 ,  G09G2320/0626 ,  G09G2320/0673 ,  G09G2360/144

摘要： A sensor includes a first sensor transistor receiving external light and generating a first sensing current based on an amount of the received external light, a first capacitor storing a first sensing voltage based on the first sensing current from the first sensor transistor, a second sensor transistor receiving external heat and generating a second sensing current based on an amount of the received external heat, a second capacitor storing a second sensing voltage based on the second sensing current from the second sensor transistor, a light blocking member blocking the second sensor transistor from external light, and an opening exposing the first sensor transistor to external light.

摘要翻译： 传感器包括：第一传感器晶体管，其接收外部光，并且基于所接收的外部光量产生第一感测电流;第一电容器，其基于来自第一传感器晶体管的第一感测电流存储第一感测电压;第二传感器晶体管 接收外部热量并基于所接收的外部热量产生第二感测电流;基于来自第二传感器晶体管的第二感测电流存储第二感测电压的第二电容器，将第二传感器晶体管从外部阻挡的遮光部件 光和将第一传感器晶体管暴露于外部光的开口。

公开(公告)号：US20080176374A1

公开(公告)日：2008-07-24

申请号：US12018469

申请日：2008-01-23

申请人： Yeol Jon ,  Eun-Kuk Chung ,  Joon Kim ,  Jin-Hong Kim

发明人： Yeol Jon ,  Eun-Kuk Chung ,  Joon Kim ,  Jin-Hong Kim

IPC分类号： H01L21/336 ,  H01L21/768

CPC分类号： H01L21/823437 ,  H01L21/76897 ,  H01L21/823475 ,  H01L21/823828 ,  H01L21/823871 ,  H01L27/11 ,  H01L29/66545

摘要： A method of fabricating a semiconductor device using a self-aligned metal shunt process is disclosed. The method can include sequentially forming a lower conductive pattern and a sacrificial pattern on a semiconductor substrate. An interlayer dielectric layer is formed to cover the sacrificial pattern. The interlayer dielectric layer is patterned to form a preliminary trench that exposes the top surface of the sacrificial pattern. The exposed sacrificial pattern is removed to form a trench that expose the top surface of the lower conductive pattern. An upper conductive pattern is formed to fill the trench.

摘要翻译： 公开了使用自对准金属分流工艺制造半导体器件的方法。 该方法可以包括在半导体衬底上顺序地形成下导电图案和牺牲图案。 形成层间电介质层以覆盖牺牲图案。 图案化层间电介质层以形成暴露牺牲图案的顶表面的预备沟槽。 去除暴露的牺牲图案以形成暴露下导电图案的顶表面的沟槽。 形成上部导电图案以填充沟槽。