公开(公告)号：US06831329B2

公开(公告)日：2004-12-14

申请号：US10278224

申请日：2002-10-22

申请人： Joseph A. Yedinak ,  Jon Gladish ,  Sampat Shekhawat ,  Gary M. Dolny ,  Praveen Muraleedharan Shenoy ,  Douglas Joseph Lange ,  Mark L. Rinehimer

发明人： Joseph A. Yedinak ,  Jon Gladish ,  Sampat Shekhawat ,  Gary M. Dolny ,  Praveen Muraleedharan Shenoy ,  Douglas Joseph Lange ,  Mark L. Rinehimer

IPC分类号： H01L21336

CPC分类号： H01L29/4232 ,  H01L29/1095 ,  H01L29/66333 ,  H01L29/7395

摘要： A quick punch-through integrated gate bipolar transistor (IGBT) includes a drift region and a gate. The drift region has a drift region dopant concentration and a drift region thickness. The gate has a gate capacitance. The drift region dopant concentration, drift region thickness and gate capacitance are adjusted dependent at least in part upon the PNP gain of the IGBT to maintain the potential difference between the gate and emitter at a level greater than the IGBT threshold voltage when the collector voltage reaches the bus voltage. This insures that the hole carrier concentration remains approximately equal to or greater than the drift region dopant concentration when the depletion layer punches through to the buffer region during the turn-off delay. Thus, the collector voltage overshoot and the rate of change of voltage and current are controlled, and electromagnetic interference is reduced, during turn off.

摘要翻译： 快速穿透式集成栅双极晶体管（IGBT）包括漂移区和栅极。 漂移区具有漂移区掺杂浓度和漂移区厚度。 栅极具有栅极电容。 调整漂移区掺杂浓度，漂移区厚度和栅极电容至少部分依赖于IGBT的PNP增益，以在集电极电压达到时将栅极和发射极之间的电位差维持在大于IGBT阈值电压的电平 总线电压。 这确保当在关断延迟期间耗尽层冲击到缓冲区域时，空穴载流子浓度保持近似等于或大于漂移区掺杂剂浓度。 因此，控制集电极电压过冲和电压和电流的变化率，并且在关断期间电磁干扰降低。

公开(公告)号：US06275093B1

公开(公告)日：2001-08-14

申请号：US09030871

申请日：1998-02-25

申请人： Sampat Singh Shekhawat ,  Jon Gladish ,  Anup Bhalla

发明人： Sampat Singh Shekhawat ,  Jon Gladish ,  Anup Bhalla

IPC分类号： H03K17687

CPC分类号： H03K17/0828

摘要： An IGBT gate driver circuit includes means for detecting when the collector-to-emitter voltage (Vce) of a turned-on IGBT, intended to be operated in the saturation region, increases above a preset level, indicative of a fault condition, such as a short circuit. In response to such an increase in the Vce of a turned on IGBT, the IGBT is turned-off in two steps. First, the turn-on gate drive is decreased to a level that is still above the threshold (turn-on) voltage of the IGBT in order to decrease the current flowing through the IGBT and hence, the peak power dissipation. This decrease in the current through the IGBT and the peak power dissipation increases the length of time the IGBT can withstand a fault condition such as a short circuit. Then, after decreasing the gate drive to the IGBT, the gate drive is gradually decreased until the IGBT is completely turned off.

摘要翻译： IGBT栅极驱动器电路包括用于检测旨在在饱和区域中操作的导通IGBT的集电极 - 发射极电压（Vce）何时增加到指示故障状态的预设电平以上的装置，例如 短路。 响应于导通IGBT的Vce的这种增加，IGBT分两个阶段关断。 首先，导通栅极驱动被降低到仍然高于IGBT的阈值（导通）电压的电平，以便减小流过IGBT的电流，并因此降低峰值功耗。 通过IGBT的电流的降低和峰值功率耗散增加了IGBT能够经受诸如短路的故障状态的时间长度。 然后，在将栅极驱动减少到IGBT之后，栅极驱动逐渐减小，直到IGBT完全关断。

公开(公告)号：US08884597B2

公开(公告)日：2014-11-11

申请号：US13554881

申请日：2012-07-20

申请人： Jon Gladish ,  Thomas N. Mathes ,  Sean T. Tarlton

发明人： Jon Gladish ,  Thomas N. Mathes ,  Sean T. Tarlton

IPC分类号： G05F1/00

CPC分类号： H02M1/08 ,  H02M3/1588 ,  H03K17/133 ,  H03K17/164 ,  H03K2217/0063 ,  H03K2217/0072 ,  Y02B70/1466

摘要： One embodiment provides A DC-DC converter system that includes a high side switch and a low side switch coupled to a power supply, each switch is configured to transition from an on state to an off state and from an off state to an on state to deliver current to an inductor and a load. This embodiment also includes low side driver circuitry configured to control the conduction state of the low side switch and configured to drive the low side switch with a first gate driving signal during a first mode of operation and with a second gate driving signal during a second mode of operation. The first gate driving voltage is stronger than the second gate driving signal and the second gate driving signal is configured to cause a slower switch transition of the low side switch compared to the first gate drive control signal.

摘要翻译： 一个实施例提供一种DC-DC转换器系统，其包括耦合到电源的高侧开关和低侧开关，每个开关被配置为从接通状态转换到断开状态，并且从断开状态转换到接通状态到 将电流传递到电感和负载。 该实施例还包括低侧驱动器电路，其被配置为控制低侧开关的导通状态并且被配置为在第一操作模式期间以第一栅极驱动信号驱动低侧开关，并且在第二模式期间具有第二栅极驱动信号 的操作。 第一栅极驱动电压比第二栅极驱动信号强，并且第二栅极驱动信号被配置为导致低侧开关与第一栅极驱动控制信号相比较慢的开关转变。

公开(公告)号：US20140021933A1

公开(公告)日：2014-01-23

申请号：US13554881

申请日：2012-07-20

申请人： Jon Gladish ,  Thomas N. Mathes ,  Sean T. Tarlton

发明人： Jon Gladish ,  Thomas N. Mathes ,  Sean T. Tarlton

IPC分类号： G05F3/08

CPC分类号： H02M1/08 ,  H02M3/1588 ,  H03K17/133 ,  H03K17/164 ,  H03K2217/0063 ,  H03K2217/0072 ,  Y02B70/1466

摘要： One embodiment provides A DC-DC converter system that includes a high side switch and a low side switch coupled to a power supply, each switch is configured to transition from an on state to an off state and from an off state to an on state to deliver current to an inductor and a load. This embodiment also includes low side driver circuitry configured to control the conduction state of the low side switch and configured to drive the low side switch with a first gate driving signal during a first mode of operation and with a second gate driving signal during a second mode of operation. The first gate driving voltage is stronger than the second gate driving signal and the second gate driving signal is configured to cause a slower switch transition of the low side switch compared to the first gate drive control signal.

摘要翻译： 一个实施例提供一种DC-DC转换器系统，其包括耦合到电源的高侧开关和低侧开关，每个开关被配置为从接通状态转换到断开状态，并且从断开状态转换到接通状态到 将电流传递到电感和负载。 该实施例还包括低侧驱动器电路，其被配置为控制低侧开关的导通状态并且被配置为在第一操作模式期间以第一栅极驱动信号驱动低侧开关，并且在第二模式期间具有第二栅极驱动信号 的操作。 第一栅极驱动电压比第二栅极驱动信号强，并且第二栅极驱动信号被配置为导致低侧开关与第一栅极驱动控制信号相比较慢的开关转变。

公开(公告)号：US20100163950A1

公开(公告)日：2010-07-01

申请号：US12492101

申请日：2009-06-25

申请人： Jon Gladish ,  Arthur Black

发明人： Jon Gladish ,  Arthur Black

IPC分类号： H01L27/06

CPC分类号： H03K17/162 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66181 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/7817 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure includes a power transistor monolithically integrated with a RC snubber in a die. The power transistor includes body regions extending in a silicon region, gate electrodes insulated from the body region by a gate dielectric, source regions extending in the body regions, the source and the body regions being of opposite conductivity type, and a source interconnect contacting the source regions. The RC snubber comprises including snubber electrodes insulated from the silicon region by a snubber dielectric such that the snubber electrodes and the silicon region form a snubber capacitor having a predetermined value. The snubber electrodes are connected to the source interconnect in a manner so as to form a snubber resistor of a predetermined value between the snubber capacitor and the source interconnect. The snubber capacitor and the snubber resistor are configured to substantially dampen output ringing when the power transistor switches states.

摘要翻译： 半导体结构包括与芯片中的RC缓冲器单片集成的功率晶体管。 功率晶体管包括在硅区域中延伸的主体区域，通过栅极电介质与体区域绝缘​​的栅电极，在体区域中延伸的源极区域，源极和体区域具有相反的导电类型，以及源极互连件 源地区。 RC缓冲器包括通过缓冲电介质与硅区域绝缘的缓冲电极，使得缓冲电极和硅区域形成具有预定值的缓冲电容器。 缓冲电极以这样的方式连接到源互连，以在缓冲电容器和源互连之间形成预定值的缓冲电阻器。 缓冲电容器和缓冲电阻器被配置为当功率晶体管切换状态时基本上抑制输出振铃。

公开(公告)号：US08829624B2

公开(公告)日：2014-09-09

申请号：US12492101

申请日：2009-06-25

申请人： Jon Gladish ,  Arthur Black

发明人： Jon Gladish ,  Arthur Black

IPC分类号： H01L27/088 ,  H01L27/06 ,  H01L29/78 ,  H03K17/16 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/40

CPC分类号： H03K17/162 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4175 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66181 ,  H01L29/7803 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/7817 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： In one general aspect, a semiconductor structure can include a power transistor including a body region extending in a silicon region, a gate electrode insulated from the body region by a gate dielectric, a source region extending in the body region where the source region is of opposite conductivity type from the body region, a source interconnect contacting the source region, and a backside drain. The semiconductor structure can include an RC snubber monolithically integrated with the power transistor in a die. The RC snubber can include a snubber electrode insulated from the silicon region by a snubber dielectric such that the snubber electrode and the silicon region form a snubber capacitor.

摘要翻译： 在一个一般的方面，半导体结构可以包括功率晶体管，其包括在硅区域中延伸的主体区域，通过栅极电介质与体区绝缘的栅极电极，源区域在源区域为 与身体区域相反的导电类型，与源区接触的源极互连和背面漏极。 半导体结构可以包括与芯片中的功率晶体管单片集成的RC缓冲器。 RC缓冲器可以包括通过缓冲介电体与硅区域绝缘的缓冲电极，使得缓冲电极和硅区域形成缓冲电容器。