System and method of digitally testing an analog driver circuit
    1.
    发明授权
    System and method of digitally testing an analog driver circuit 失效
    数字测试模拟驱动电路的系统和方法

    公开(公告)号:US07659740B2

    公开(公告)日:2010-02-09

    申请号:US12189226

    申请日:2008-08-11

    IPC分类号: G01R31/02 G01R31/26

    CPC分类号: G01R31/3167 G01R31/318544

    摘要: Digital testing of an analog driver circuit is enabled using a circuit including a control circuit for generating signals, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit, and a differential receiver circuit for converting the differential output signal to a single ended signal and transmitting the single ended signal. The testing includes skewing a differential output termination impedance, adjusting a differential receiver circuit voltage offset, selecting a differential driver circuit power level, enabling a decoder which activates only one differential driver circuit segment per test sequence, activating a segment, stimulating the differential driver circuit with digital test patterns, receiving differential driver circuit output, converting the output to a single-ended signal, and observing the single-ended signal.

    摘要翻译: 使用包括用于产生信号的控制电路的电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号和发送差分输出信号来实现模拟驱动器电路的数字测试,用于产生可编程终端阻抗电路 在差分驱动电路的输出节点处的差分终端阻抗,以及用于将差分输出信号转换为单端信号并发送单端信号的差分接收电路。 测试包括偏移差分输出终端阻抗,调整差分接收器电路电压偏移,选择差分驱动器电路功率电平,使得能够在每个测试序列仅激活一个差分驱动器电路段的解码器,激活段,激励差分驱动器电路 具有数字测试模式,接收差分驱动电路输出,将输出转换为单端信号,并观察单端信号。

    System And Method of Digitally Testing An Analog Driver Circuit
    2.
    发明申请
    System And Method of Digitally Testing An Analog Driver Circuit 失效
    数字测试模拟驱动电路的系统和方法

    公开(公告)号:US20090027075A1

    公开(公告)日:2009-01-29

    申请号:US12189226

    申请日:2008-08-11

    IPC分类号: G01R31/28

    CPC分类号: G01R31/3167 G01R31/318544

    摘要: A circuit and method of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention comprises a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal. The method of the present invention comprises digitally testing the differential driver circuit by activating a test enable signal, skewing the differential output termination impedance in response to the test enable signal, adjusting a voltage offset of the differential receiver circuit in response to the test enable signal, selecting a power level for the differential driver circuit in response to the test enable signal, enabling a decoder in response to the test enable signal, wherein the decoder activates only one segment of the differential driver circuit during any one test sequence, activating one of the segments for testing, stimulating the differential driver circuit with digital test patterns, receiving an output of the differential driver circuit by the differential receiver circuit, converting the received differential driver output to a single-ended signal, observing the single-ended signal; and deactivating the test enable signal.

    摘要翻译: 使用基于数字扫描的测试方法测试模拟驱动器电路的电路和方法。 本发明的电路包括用于响应于测试使能信号产生信号的控制电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号并响应差分输入信号发送差分输出信号 以及由所述控制电路产生的信号,用于响应于由所述控制电路产生的信号而在所述差分驱动器电路的输出节点处产生差分终端阻抗的可编程终端阻抗电路以及用于从所述差分接收电路接收所述差分输出的差分接收电路 差分驱动器电路将差分输出信号转换为单端信号并传输单端信号,全部是响应于测试使能信号。 本发明的方法包括通过激活测试使能信号来数字测试差分驱动器电路,响应于测试使能信号偏移差动输出终​​端阻抗,响应于测试使能信号调整差分接收器电路的电压偏移 ,响应于所述测试使能信号选择所述差分驱动器电路的功率电平,使能够响应于所述测试使能信号的解码器,其中所述解码器在任何一个测试序列期间仅激活所述差分驱动器电路的一个部分, 用于测试的段,用数字测试图案刺激差分驱动器电路,通过差分接收器电路接收差分驱动器电路的输出,将接收到的差分驱动器输出转换为单端信号,观察单端信号; 并禁用测试使能信号。

    System of digitally testing an analog driver circuit
    3.
    发明授权
    System of digitally testing an analog driver circuit 失效
    数字测试模拟驱动电路的系统

    公开(公告)号:US07466156B2

    公开(公告)日:2008-12-16

    申请号:US10708788

    申请日:2004-03-25

    IPC分类号: G01R31/02

    CPC分类号: G01R31/3167 G01R31/318544

    摘要: A circuit of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention includes a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal.

    摘要翻译: 使用基于数字扫描的测试方法测试模拟驱动器电路的电路。 本发明的电路包括用于响应于测试使能信号产生信号的控制电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号并响应差分输入信号发送差分输出信号 以及由所述控制电路产生的信号,用于响应于由所述控制电路产生的信号而在所述差分驱动器电路的输出节点处产生差分终端阻抗的可编程终端阻抗电路以及用于从所述差分接收电路接收所述差分输出的差分接收电路 差分驱动器电路将差分输出信号转换为单端信号并传输单端信号,全部是响应于测试使能信号。

    AUTOMATIC ADAPTIVE EQUALIZATION METHOD AND SYSTEM FOR HIGH-SPEED SERIAL TRANSMISSION LINK
    4.
    发明申请
    AUTOMATIC ADAPTIVE EQUALIZATION METHOD AND SYSTEM FOR HIGH-SPEED SERIAL TRANSMISSION LINK 失效
    用于高速串行传输链路的自动适应均衡方法和系统

    公开(公告)号:US20050281343A1

    公开(公告)日:2005-12-22

    申请号:US10710064

    申请日:2004-06-16

    IPC分类号: H04L25/00 H04L25/03

    CPC分类号: H04L25/03057 H04L25/03343

    摘要: A data communication system includes a transmitter unit and a receiver unit. The transmission unit has a transmission characteristic that is adjustable in accordance with equalization information. The transmission unit is operable to transmit a predetermined signal and the receiver unit is operable to receive the predetermined signal. The receiver unit is further operable to generate the equalization information by examining the eye opening of the received signal, and to transmit the equalization information to the transmitter unit.

    摘要翻译: 数据通信系统包括发射机单元和接收机单元。 发送单元具有根据均衡信息可调的传输特性。 发送单元可操作以发送预定信号,并且接收器单元可操作以接收预定信号。 接收机单元进一步可操作以通过检查接收到的信号的眼图来产生均衡信息,并将均衡信息发送到发射机单元。

    Front end interface for data receiver
    5.
    发明授权
    Front end interface for data receiver 失效
    数据接收机的前端接口

    公开(公告)号:US07519130B2

    公开(公告)日:2009-04-14

    申请号:US10905705

    申请日:2005-01-18

    IPC分类号: H04L25/34

    CPC分类号: H04L25/0274 H04L25/0296

    摘要: A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

    摘要翻译: 提供一种数据接收器,其包括具有交流(AC)发送接收模式和直流(DC)发送接收模式的前端接口电路。 前端接口电路包括偏移补偿电路,其可操作以补偿输入到数据接收器的一对差分信号之间的直流电压偏移。 前端接口电路还包括可操作以在(a)直流发送接收模式和(b)交流发送接收模式之间切换的AC / DC选择单元,使得数据接收器可操作于(i)直流传输 偏移补偿电路被禁用的模式,(ii)使能偏移补偿电路的直流传输模式,(iii)偏移补偿电路被禁用的AC传输模式,以及(iv)AC传输接收 偏移补偿电路使能的模式。

    System And Method Of Digitally Testing An Analog Driver Circuit
    6.
    发明申请
    System And Method Of Digitally Testing An Analog Driver Circuit 失效
    数字测试模拟驱动电路的系统和方法

    公开(公告)号:US20050246125A1

    公开(公告)日:2005-11-03

    申请号:US10708788

    申请日:2004-03-25

    CPC分类号: G01R31/3167 G01R31/318544

    摘要: A circuit and method of testing an analog driver circuit using digital scan-based test methodologies. The circuit of the present invention comprises a control circuit for generating signals in response to a test enable signal, a differential driver circuit for receiving a differential input signal, amplifying the differential input signal and transmitting a differential output signal in response to the differential input signal and the signals generated by the control circuit, a programmable termination impedance circuit for generating a differential termination impedance at the output node of the differential driver circuit in response the signals generated by the control circuit, and a differential receiver circuit for receiving the differential output from the differential driver circuit, convert the differential output signal to a single ended signal and transmitting the single ended signal, all in response to the test enable signal. The method of the present invention comprises digitally testing the differential driver circuit by activating a test enable signal, skewing the differential output termination impedance in response to the test enable signal, adjusting a voltage offset of the differential receiver circuit in response to the test enable signal, selecting a power level for the differential driver circuit in response to the test enable signal, enabling a decoder in response to the test enable signal, wherein the decoder activates only one segment of the differential driver circuit during any one test sequence, activating one of the segments for testing, stimulating the differential driver circuit with digital test patterns, receiving an output of the differential driver circuit by the differential receiver circuit, converting the received differential driver output to a single-ended signal, observing the single-ended signal; and deactivating the test enable signal.

    摘要翻译: 使用基于数字扫描的测试方法测试模拟驱动器电路的电路和方法。 本发明的电路包括用于响应于测试使能信号产生信号的控制电路,用于接收差分输入信号的差分驱动器电路,放大差分输入信号并响应差分输入信号发送差分输出信号 以及由所述控制电路产生的信号,用于响应于由所述控制电路产生的信号而在所述差分驱动器电路的输出节点处产生差分终端阻抗的可编程终端阻抗电路以及用于从所述差分接收电路接收所述差分输出的差分接收电路 差分驱动器电路将差分输出信号转换为单端信号并传输单端信号,全部是响应于测试使能信号。 本发明的方法包括通过激活测试使能信号来数字测试差分驱动器电路,响应于测试使能信号偏移差动输出终​​端阻抗,响应于测试使能信号调整差分接收器电路的电压偏移 ,响应于所述测试使能信号选择所述差分驱动器电路的功率电平,使能够响应于所述测试使能信号的解码器,其中所述解码器在任何一个测试序列期间仅激活所述差分驱动器电路的一个部分, 用于测试的段,用数字测试图案刺激差分驱动器电路,通过差分接收器电路接收差分驱动器电路的输出,将接收到的差分驱动器输出转换为单端信号,观察单端信号; 并禁用测试使能信号。

    Structure for robust cable connectivity test receiver for high-speed data receiver
    7.
    发明授权
    Structure for robust cable connectivity test receiver for high-speed data receiver 有权
    用于高速数据接收机的坚固电缆连接测试接收机的结构

    公开(公告)号:US07873922B2

    公开(公告)日:2011-01-18

    申请号:US11985956

    申请日:2007-11-19

    IPC分类号: G06F17/50

    CPC分类号: G06F11/24

    摘要: A design structure embodied in a machine-readable medium used in a design process may include a system for detecting a fault in a signal transmission path. Such system may include, for example, a hysteresis comparator including a latch having n-type field effect transistor (“NFET”) storage elements. The hysteresis comparator may be operable to detect a crossing of a reference voltage level by an input signal arriving from the signal transmission path such that when the comparator does not detect an expected crossing of the reference voltage level by the input signal, the fault is determined to be detected in the signal transmission path.

    摘要翻译: 在设计过程中使用的机器可读介质中体现的设计结构可以包括用于检测信号传输路径中的故障的系统。 这种系统可以包括例如包括具有n型场效应晶体管(“NFET”)存储元件的锁存器的滞后比较器。 滞后比较器可以用于检测参考电压电平与从信号传输路径到达的输入信号的交叉,使得当比较器没有检测到参考电压电平与输入信号的预期交叉时,确定故障 以在信号传输路径中被检测。

    METHOD TO AVOID DEVICE STRESSING
    8.
    发明申请
    METHOD TO AVOID DEVICE STRESSING 有权
    避免设备压力的方法

    公开(公告)号:US20070096797A1

    公开(公告)日:2007-05-03

    申请号:US11163688

    申请日:2005-10-27

    IPC分类号: G05F1/10

    摘要: A system for protecting a weak device operating in micro-electronic circuit that includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

    摘要翻译: 用于保护微电子电路中操作的弱电装置的系统包括来自高压过应力的高电压电源,防止在上电,掉电期间以及当多功率电源中的低电压电源时弱装置发生故障 供应系统不存在。 该系统包括低电压电源检测电路,其被配置为检测电路上电,电路掉电以及当低电压电源不存在时,并且在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置,以响应于在电路加电,电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道, 并且当低电压电源不存在时。

    Design structure for transmitter bandwidth optimization circuit
    9.
    发明授权
    Design structure for transmitter bandwidth optimization circuit 有权
    发射机带宽优化电路的设计结构

    公开(公告)号:US08219041B2

    公开(公告)日:2012-07-10

    申请号:US11985963

    申请日:2007-11-19

    IPC分类号: H04B1/02

    CPC分类号: H04L25/0286 H04L25/03343

    摘要: A design structure embodied in a machine-readable medium used in a design process provides a transmitter having a frequency response controllable in accordance with an operational parameter, and may include a storage operable to store operational parameters for controlling a frequency response of the transmitter under each of a plurality of corresponding operating conditions. A sensor can be used to detect an operating condition. In response to a change in the detected operating condition, a stored operational parameter corresponding to the detected operating condition can be used to control the frequency response of the transmitter.

    摘要翻译: 体现在设计过程中使用的机器可读介质中的设计结构提供具有根据操作参数可控的频率响应的发射机,并且可以包括可操作地存储用于控制每个发射机的频率响应的操作参数的存储器 的多个相应的操作条件。 可以使用传感器来检测操作状态。 响应于检测到的操作条件的变化,可以使用与检测到的操作条件对应的存储的操作参数来控制发送器的频率响应。

    Avoiding device stressing
    10.
    发明授权
    Avoiding device stressing 失效
    避免设备强调

    公开(公告)号:US07694243B2

    公开(公告)日:2010-04-06

    申请号:US11964894

    申请日:2007-12-27

    IPC分类号: G06F17/50

    CPC分类号: H03K19/00315

    摘要: A system for protecting a weak device operating in micro-electronic circuit and a design structure including the system embodied in a machine readable medium are disclosed. The system includes a high voltage power supply from high voltage overstressing prevents the weak device from failing during power-up, power-down, and when a low voltage power supply in a multiple power supply system is absent. The system further includes a low voltage power supply detection circuit configured to detect circuit power-up, circuit power-down, and when the low voltage power supply is absent, and generate a control signal upon detection. The system further includes a controlled current mirror device configured to provide a trickle current to maintain a conduction channel in the weak device in response to the control signal received from the low voltage power supply detection circuit during circuit power-up, circuit power-down, and when the low voltage power supply is absent.

    摘要翻译: 公开了一种用于保护在微电子电路中操作的弱设备的系统和包括体现在机器可读介质中的系统的设计结构。 该系统包括来自高压过应力的高压电源,防止弱电装置在上电,掉电期间以及当多电源系统中的低电压电源不存在时发生故障。 该系统还包括:低电压电源检测电路,被配置为检测电路上电,电路断电以及当低电压电源不存在时,并在检测时产生控制信号。 该系统还包括被配置为提供涓流电流的受控电流镜装置,以响应于在电路加电,电路断电期间从低电压电源检测电路接收的控制信号来保持弱装置中的导通通道, 并且当低电压电源不存在时。