Method for fabricating self-aligned contact connections on buried bit lines
    1.
    发明授权
    Method for fabricating self-aligned contact connections on buried bit lines 失效
    用于在掩埋位线上制造自对准接触连接的方法

    公开(公告)号:US06913987B2

    公开(公告)日:2005-07-05

    申请号:US10728388

    申请日:2003-12-05

    摘要: Word lines of a semiconductor component are provided with an encapsulation of dielectric material, Spacers of oxide extend alongside at the sidewalls of the word lines. The spacers are subsequently covered together with the word lines with a nitride layer. Borophosporosilicate glass is introduced between those portions of the nitride layer which respectively belong to a word line and is removed selectively with respect to the nitride using a mask. Contact hole fillings for the electrical connection of the buried bit lines are introduced into the contact holes thus formed.

    摘要翻译: 半导体元件的字线被提供有电介质材料的封装,氧化物隔离物在字线的侧壁旁边延伸。 间隔物随后用氮化物层与字线一起被覆盖。 硼氮硅玻璃被引入到分别属于字线的氮化物层的这些部分之间并且使用掩模相对于氮化物被选择性地去除。 将掩埋位线的电连接的接触孔填充物引入由此形成的接触孔中。

    Nonvolatile semiconductor memory device and method for testing the same
    2.
    发明申请
    Nonvolatile semiconductor memory device and method for testing the same 审中-公开
    非易失性半导体存储器件及其测试方法

    公开(公告)号:US20070230261A1

    公开(公告)日:2007-10-04

    申请号:US11396928

    申请日:2006-04-04

    摘要: A nonvolatile semiconductor memory device includes transistor-based memory cells. Each memory cell has a first and a second source/drain region, a channel region separating the first and the second source/drain region, a storage layer and a control gate. The control gates of the memory cells are connected to word lines. The first and second source/drain regions are connected to bit lines respectively. Each memory cell may be programmed by injecting first charge carriers of a first polarity and may be erased by injecting second charge carriers having the opposite polarity into the storage layer respectively. By applying a high stress voltage between bit line and word line, weak insulator structures may break through such that they become detectable as short-circuits by a low voltage leakage test. By applying the stress voltage contemporaneously on both sides of the memory cells, an early overerase/overprogram, resulting from hot carrier injection, is avoided.

    摘要翻译: 非易失性半导体存储器件包括基于晶体管的存储单元。 每个存储单元具有第一和第二源极/漏极区域,分隔第一和第二源极/漏极区域的沟道区域,存储层和控制栅极。 存储单元的控制栅极连接到字线。 第一和第二源/漏区分别连接到位线。 可以通过注入第一极性的第一电荷载流子来对每个存储单元进行编程,并且可以通过将具有相反极性的第二电荷载体分别注入到存储层中来擦除。 通过在位线和字线之间施加高应力电压,弱绝缘体结构可能突破,使得它们通过低电压泄漏测试成为短路检测。 通过将应力电压同时施加在记忆细胞的两侧,避免了由热载体注入引起的早期过度/过度程序。

    Integrated circuit with a control input that can be disabled
    3.
    发明申请
    Integrated circuit with a control input that can be disabled 有权
    具有可禁用的控制输入的集成电路

    公开(公告)号:US20060212765A1

    公开(公告)日:2006-09-21

    申请号:US11079889

    申请日:2005-03-14

    申请人: Juerg Haufe

    发明人: Juerg Haufe

    IPC分类号: G01R31/28

    摘要: An integrated circuit comprises a control unit, a plurality of control inputs for the provision of control signals to said control unit and a deactivation circuit for disabling the provision of at least one of said control signals. After reception of a first coded message by said integrated circuit the provision of at least one of said control signals to the control unit can be disabled by said deactivation circuit.

    摘要翻译: 集成电路包括控制单元,用于向所述控制单元提供控制信号的多个控制输入和用于禁止提供至少一个所述控制信号的去激活电路。 在由所述集成电路接收到第一编码消息之后,可以通过所述去激活电路来禁止向控制单元提供至少一个所述控制信号。

    Integrated circuit with a control input that can be disabled
    4.
    发明授权
    Integrated circuit with a control input that can be disabled 有权
    具有可禁用的控制输入的集成电路

    公开(公告)号:US07409609B2

    公开(公告)日:2008-08-05

    申请号:US11079889

    申请日:2005-03-14

    申请人: Juerg Haufe

    发明人: Juerg Haufe

    IPC分类号: G01R31/28

    摘要: An integrated circuit comprises a control unit, a plurality of control inputs for the provision of control signals to said control unit and a deactivation circuit for disabling the provision of at least one of said control signals. After reception of a first coded message by said integrated circuit the provision of at least one of said control signals to the control unit can be disabled by said deactivation circuit.

    摘要翻译: 集成电路包括控制单元,用于向所述控制单元提供控制信号的多个控制输入和用于禁止提供至少一个所述控制信号的去激活电路。 在由所述集成电路接收到第一编码消息之后,可以通过所述去激活电路来禁止向控制单元提供至少一个所述控制信号。