公开(公告)号：US5262999A

公开(公告)日：1993-11-16

申请号：US838505

申请日：1992-03-24

申请人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

发明人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

IPC分类号： G11C5/14 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096 ,  G11C7/00

CPC分类号： G11C5/147 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096

摘要： Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.

摘要翻译： 公开了一种单芯片ULSI，其可以在宽范围的电源电压（1V至5.5V）中进行固定操作。 该单芯片ULSI由一个电压转换器电路组成，该电路用于宽范围电源电压的固定内部电压，可适用于多个输入/输出电平的输入/输出缓冲器，一个动态RAM 可以在2V以下的电源电压下工作的这种单芯片ULSI可以应用于紧凑型便携式电子设备，例如笔记本型个人计算机，电子口袋笔记本， 固态摄像机等

公开(公告)号：US5297097A

公开(公告)日：1994-03-22

申请号：US366869

申请日：1989-06-14

申请人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

发明人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

IPC分类号： G11C5/14 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096 ,  G11C11/407

CPC分类号： G11C11/4096 ,  G11C11/406 ,  G11C11/4074 ,  G11C5/147

摘要： Disclosed is a one-chip ULSI which can carry out fixed operations for a wide range of power supply voltages (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which provides a fixed internal voltage for a wide range of power supply voltages, an input/output buffer which can be adapted to several input/out interface levels, a dynamic or volatile RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.

摘要翻译： 公开了一种单芯片ULSI，其可以对宽范围的电源电压（1V至5.5V）进行固定操作。 该单芯片ULSI由一个电压转换器电路组成，该电路为广泛的电源电压提供固定的内部电压，可适应多个输入/输出接口电平的输入/输出缓冲器，动态或 可以在2V以下的电源电压下工作的易失性RAM。该单芯片ULSI可以应用于紧凑型便携式电子设备，例如笔记本型个人计算机，电子口袋笔记本 ，固态摄像机等

公开(公告)号：US5526313A

公开(公告)日：1996-06-11

申请号：US104508

申请日：1993-08-10

申请人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

发明人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

IPC分类号： G11C5/14 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4096 ,  G11C7/00

CPC分类号： G11C11/4096 ,  G11C11/406 ,  G11C11/4074 ,  G11C5/147

摘要： Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.

公开(公告)号：USRE37593E1

公开(公告)日：2002-03-19

申请号：US09095101

申请日：1998-06-10

申请人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

发明人： Jun Etoh ,  Kiyoo Itoh ,  Yoshiki Kawajiri ,  Yoshinobu Nakagome ,  Eiji Kume ,  Hitoshi Tanaka

IPC分类号： G11C700

CPC分类号： G11C11/4096 ,  G11C5/147 ,  G11C11/406 ,  G11C11/4074

摘要： Disclosed is a one-chip ULSI which can carry out the fixed operation in a wide range of power supply voltage (1 V to 5.5 V). This one-chip ULSI is composed of a voltage converter circuit(s) which serves to a fixed internal voltage for a wide range of power supply voltage, an input/output buffer which can be adapted to several input/output levels, a dynamid RAM(s) which can operate at a power supply voltage of 2 V or less, etc. This one-chip ULSI can be applied to compact and portable electronic devices such as a lap-top type personal computer, an electronic pocket note book, a solid-state camera, etc.

摘要翻译： 公开了一种单芯片ULSI，其可以在宽范围的电源电压（1V至5.5V）中进行固定操作。 该单芯片ULSI由一个电压转换器电路组成，该电路用于宽范围电源电压的固定内部电压，可适用于多个输入/输出电平的输入/输出缓冲器，一个动态RAM 可以在2V以下的电源电压下工作的这种单芯片ULSI可以应用于紧凑型便携式电子设备，例如笔记本型个人计算机，电子口袋笔记本， 固态摄像机等

公开(公告)号：US5677880A

公开(公告)日：1997-10-14

申请号：US407850

申请日：1995-03-21

申请人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

发明人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

IPC分类号： G11C11/413 ,  G11C5/14 ,  G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C29/83 ,  G11C29/832 ,  G11C5/14

摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.

摘要翻译： 在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。 另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。 开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。 然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。

公开(公告)号：US4994688A

公开(公告)日：1991-02-19

申请号：US323966

申请日：1989-03-15

申请人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

发明人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

IPC分类号： G05F1/46 ,  G05F3/24 ,  G11C5/14 ,  G11C11/4074 ,  H01L27/02

CPC分类号： G11C5/147 ,  G05F1/465 ,  G05F3/245 ,  G05F3/247 ,  G11C11/4074 ,  H01L27/0203 ,  Y10S323/907

摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.

摘要翻译： 涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。 可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。 提供了改进的测试这些电路的方法。

公开(公告)号：US5179539A

公开(公告)日：1993-01-12

申请号：US865677

申请日：1992-04-08

申请人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

发明人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

IPC分类号： G05F1/46 ,  G05F3/24 ,  G11C5/14 ,  G11C11/4074 ,  H01L27/02

CPC分类号： G11C5/147 ,  G05F1/465 ,  G05F3/245 ,  G05F3/247 ,  G11C11/4074 ,  H01L27/0203

摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.

摘要翻译： 涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。 可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。 提供了改进的测试这些电路的方法。

公开(公告)号：US5402376A

公开(公告)日：1995-03-28

申请号：US103781

申请日：1993-08-10

申请人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

发明人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

IPC分类号： G11C11/413 ,  G11C5/14 ,  G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C29/83 ,  G11C29/832 ,  G11C5/14

摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.

摘要翻译： 在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。 另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。 开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。 然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。

公开(公告)号：US5376839A

公开(公告)日：1994-12-27

申请号：US104340

申请日：1993-08-09

申请人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

发明人： Masashi Horiguchi ,  Masakazu Aoki ,  Kiyoo Itoh ,  Yoshinobu Nakagome ,  Norio Miyake ,  Takaaki Noda ,  Jun Etoh ,  Hitoshi Tanaka ,  Shin'ichi Ikenaga

IPC分类号： G05F1/46 ,  G05F3/24 ,  G11C5/14 ,  G11C11/4074 ,  H01L27/02 ,  H03K3/01 ,  H03K3/26

CPC分类号： G05F1/465 ,  G05F3/245 ,  G05F3/247 ,  G11C11/4074 ,  G11C5/147 ,  H01L27/0203

摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.

摘要翻译： 涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。 可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。 提供了改进的测试这些电路的方法。

公开(公告)号：US5262993A

公开(公告)日：1993-11-16

申请号：US789024

申请日：1991-11-06

申请人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

发明人： Masashi Horiguchi ,  Jun Etoh ,  Masakazu Aoki ,  Yoshinobu Nakagome ,  Hitoshi Tanaka ,  Kiyoo Itoh

IPC分类号： G11C11/413 ,  G11C5/14 ,  G11C11/401 ,  G11C29/00 ,  G11C29/04 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C29/83 ,  G11C29/832 ,  G11C5/14

摘要： In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.

摘要翻译： 在半导体存储器中，提供开关电路，以便当需要时，禁止向每个正常存储器块提供电压和信号。 另一方面，在半导体存储器处于待机模式时，在芯片上提供ROM以存储消耗过大待机电流的缺陷存储块的地址。 开关电路由ROM的输出控制，以便阻止向缺陷存储器块提供电压和信号。 然后，代替有缺陷的正常存储块的备用存储块接收电压和信号供应。