公开(公告)号：US08455853B2

公开(公告)日：2013-06-04

申请号：US13442047

申请日：2012-04-09

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L47/00

CPC分类号： H01L21/02225 ,  H01L27/2409 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/16

摘要： A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.

公开(公告)号：US20120193598A1

公开(公告)日：2012-08-02

申请号：US13442047

申请日：2012-04-09

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L45/00

CPC分类号： H01L21/02225 ,  H01L27/2409 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/16

摘要： A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.

摘要翻译： 一种方法包括在具有含金属的导电互连的集成电路上形成电绝缘体材料，并激活衬底的半导体材料中的掺杂剂以提供掺杂区域。 掺杂区域提供相反导电类型的结。 在激活掺杂剂之后，衬底被结合到绝缘体材料上，并且至少部分衬底在与绝缘体材料接合的情况下被去除。 在移除之后，形成具有字线，存取二极管，含有硫族化物相变材料的状态可变存储元件和全部电连接的位线的存储单元，该存储二极管包含该结作为pn结 。 存储器件包括绝缘体材料上的粘合材料并将字线连接到绝缘体材料上。

公开(公告)号：US08488365B2

公开(公告)日：2013-07-16

申请号：US13034031

申请日：2011-02-24

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： G11C11/00

CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C2013/0073 ,  G11C2213/72 ,  G11C2213/73 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/145 ,  H01L45/1608 ,  H01L45/165

摘要： Some embodiments include methods in which a memory cell is formed to have programmable material between first and second access lines, with the programmable material having two compositionally different regions. A concentration of ions and/or ion-vacancies may be altered in at least one of the regions to change a memory state of the memory cell and to simultaneously form a pn diode. Some embodiments include memory cells having programmable material with two compositionally different regions, and having ions and/or ion-vacancies diffusible into at least one of the regions. The memory cell has a memory state in which the first and second regions are of opposite conductivity type relative to one another.

摘要翻译： 一些实施例包括其中存储单元形成为在第一和第二访问线之间具有可编程材料的方法，其中可编程材料具有两个组成上不同的区域。 可以在至少一个区域中改变离子和/或离子空位的浓度以改变存储器单元的存储状态并同时形成pn二极管。 一些实施例包括具有两个组成不同区域的可编程材料并且具有可扩散到至少一个区域中的离子和/或离子空位的存储器单元。 存储单元具有其中第一和第二区域相对于彼此具有相反导电类型的存储状态。

公开(公告)号：US08472240B2

公开(公告)日：2013-06-25

申请号：US13108385

申请日：2011-05-16

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： G11C11/00

CPC分类号： G11C11/16 ,  G11C11/161 ,  H01L29/66984 ,  H01L43/02 ,  H01L43/08

摘要： Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise an annular STT stack including a nonmagnetic material between a first ferromagnetic material and a second ferromagnetic material and a soft magnetic material surrounding at least a portion of the annular STT stack.

公开(公告)号：US07858468B2

公开(公告)日：2010-12-28

申请号：US12261948

申请日：2008-10-30

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L21/8239

CPC分类号： H01L21/02225 ,  H01L27/2409 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/16

摘要： A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.

摘要翻译： 一种方法包括在具有含金属的导电互连的集成电路上形成电绝缘体材料，并激活衬底的半导体材料中的掺杂剂以提供掺杂区域。 掺杂区域提供相反导电类型的结。 在激活掺杂剂之后，衬底被结合到绝缘体材料上，并且至少部分衬底在与绝缘体材料接合的情况下被去除。 在移除之后，形成具有字线，存取二极管，含有硫族化物相变材料的状态可变存储元件和全部电连接的位线的存储单元，该存储二极管包含该结作为pn结 。 存储器件包括绝缘体材料上的粘合材料并将字线连接到绝缘体材料上。

公开(公告)号：US20120294077A1

公开(公告)日：2012-11-22

申请号：US13108385

申请日：2011-05-16

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： G11C11/16 ,  H01L21/8239 ,  H01L29/82

CPC分类号： G11C11/16 ,  G11C11/161 ,  H01L29/66984 ,  H01L43/02 ,  H01L43/08

摘要： Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise an annular STT stack including a nonmagnetic material between a first ferromagnetic material and a second ferromagnetic material and a soft magnetic material surrounding at least a portion of the annular STT stack.

摘要翻译： 本文描述了旋转转矩传递（STT）存储单元结构和方法。 一个或多个STT存储器单元结构包括在第一铁磁材料和第二铁磁材料之间包括非磁性材料的环形STT堆叠和围绕环形STT堆叠的至少一部分的软磁材料。

公开(公告)号：US20120218806A1

公开(公告)日：2012-08-30

申请号：US13034031

申请日：2011-02-24

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： G11C11/00 ,  H01L21/02 ,  H01L45/00

CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C2013/0073 ,  G11C2213/72 ,  G11C2213/73 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/145 ,  H01L45/1608 ,  H01L45/165

摘要： Some embodiments include methods in which a memory cell is formed to have programmable material between first and second access lines, with the programmable material having two compositionally different regions. A concentration of ions and/or ion-vacancies may be altered in at least one of the regions to change a memory state of the memory cell and to simultaneously form a pn diode. Some embodiments include memory cells having programmable material with two compositionally different regions, and having ions and/or ion-vacancies diffusible into at least one of the regions. The memory cell has a memory state in which the first and second regions are of opposite conductivity type relative to one another.

摘要翻译： 一些实施例包括其中存储单元形成为在第一和第二访问线之间具有可编程材料的方法，其中可编程材料具有两个组成上不同的区域。 可以在至少一个区域中改变离子和/或离子空位的浓度以改变存储器单元的存储状态并同时形成pn二极管。 一些实施例包括具有两个组成不同区域的可编程材料并且具有可扩散到至少一个区域中的离子和/或离子空位的存储器单元。 存储单元具有其中第一和第二区域相对于彼此具有相反导电类型的存储状态。

公开(公告)号：US08164081B2

公开(公告)日：2012-04-24

申请号：US12952047

申请日：2010-11-22

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L47/00

CPC分类号： H01L21/02225 ,  H01L27/2409 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/16

摘要： A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.

摘要翻译： 一种方法包括在具有含金属的导电互连的集成电路上形成电绝缘体材料，并激活衬底的半导体材料中的掺杂剂以提供掺杂区域。 掺杂区域提供相反导电类型的结。 在激活掺杂剂之后，衬底被结合到绝缘体材料上，并且至少部分衬底在与绝缘体材料接合的情况下被去除。 在移除之后，形成具有字线，存取二极管，含有硫族化物相变材料的状态可变存储元件和全部电连接的位线的存储单元，该存储二极管包含该结作为pn结 。 存储器件包括绝缘体材料上的粘合材料并将字线连接到绝缘体材料上。

公开(公告)号：US20120261637A1

公开(公告)日：2012-10-18

申请号：US13087050

申请日：2011-04-14

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L45/00

CPC分类号： H01L45/145 ,  H01L45/08 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1683

摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming an oxide based memory cell. Forming an oxide based memory cell can include forming a first conductive element, forming a substoichiometric oxide over the first conductive element, forming a second conductive element over the substoichiometric oxide, and oxidizing edges of the substoichiometric oxide by subjecting the substoichiometric oxide to an oxidizing environment to define a controlled oxygen vacancy conduction path near a center of the oxide.

摘要翻译： 与基于氧化物的存储器相关联的方法，装置和系统可以包括形成基于氧化物的存储器单元的方法。 形成基于氧化物的存储单元可以包括形成第一导电元件，在第一导电元件上形成亚化学计量氧化物，在亚化学计量氧化物上形成第二导电元件，以及通过使亚化学计量氧化物氧化成氧化环境来氧化亚化学计量氧化物的边缘 以限定氧化物中心附近的受控氧空位传导路径。

公开(公告)号：US20110062406A1

公开(公告)日：2011-03-17

申请号：US12952047

申请日：2010-11-22

申请人： Jun Liu ,  Gurtej S. Sandhu

发明人： Jun Liu ,  Gurtej S. Sandhu

IPC分类号： H01L45/00

CPC分类号： H01L21/02225 ,  H01L27/2409 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/16

摘要： A method includes forming an electrical insulator material over an integrated circuit having a metal-containing conductive interconnect and activating a dopant in a semiconductor material of a substrate to provide a doped region. The doped region provides a junction of opposite conductivity types. After activating the dopant, the substrate is bonded to the insulator material and at least some of the substrate is removed where bonded to the insulator material. After the removing, a memory cell is formed having a word line, an access diode, a state-changeable memory element containing chalcogenide phase change material, and a bit line all electrically connected in series, the access diode containing the junction as a p-n junction. A memory device includes an adhesion material over the insulator material and bonding the word line to the insulator material.

摘要翻译： 一种方法包括在具有含金属的导电互连的集成电路上形成电绝缘体材料，并激活衬底的半导体材料中的掺杂剂以提供掺杂区域。 掺杂区域提供相反导电类型的结。 在激活掺杂剂之后，衬底被结合到绝缘体材料上，并且至少部分衬底在与绝缘体材料接合的情况下被去除。 在移除之后，形成具有字线，存取二极管，含有硫族化物相变材料的状态可变存储元件和全部电连接的位线的存储单元，该存储二极管包含该结作为pn结 。 存储器件包括绝缘体材料上的粘合材料并将字线连接到绝缘体材料上。