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公开(公告)号：US20210026067A1
公开(公告)日：2021-01-28
申请号：US17032615
申请日：2020-09-25
IPC分类号： G02B6/12 , G02B6/122 , G02B6/42 , H01L27/146
摘要： Described are various configurations of optical structures having asymmetric-width waveguides. A photodetector can include parallel waveguides that have different widths, which can be connected via passive waveguide. One or more light absorbing regions can be proximate to the waveguides to absorb light propagating through one or more of the parallel waveguides. Multiple photodetectors having asymmetric width waveguides can operate to transduce light in different modes in a polarization diversity optical receiver.
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公开(公告)号：US11164893B1
公开(公告)日：2021-11-02
申请号：US16863223
申请日：2020-04-30
发明人： John Sonkoly , Erik Johan Norberg
IPC分类号： H01L27/12 , H01L21/84 , H01L23/528
摘要： In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads. Increased resistivity can be achieved, e.g., by ion-implantation, or by patterning the device layer to create disconnected semiconductor islands.
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公开(公告)号：US10998252B2
公开(公告)日：2021-05-04
申请号：US16791315
申请日：2020-02-14
IPC分类号： H01L23/42 , H01L29/868 , H01L27/12 , H01L21/768 , H01L29/66 , H01L23/36
摘要： The thermal impedance of p-i-n diodes integrated on semiconductor-on-insulator substrates can be reduced with thermally conducting vias that shunt heat across thermal barriers such as, e.g., the thick top oxide cladding often encapsulating the p-i-n diode. In various embodiments, one or more thermally conducting vias extend from a top surface of the intrinsic diode layer to a metal structure connected to the doped top layer of the diode, and/or from that metal structure down to at least the semiconductor device layer of the substrate.
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公开(公告)号：US10833213B2
公开(公告)日：2020-11-10
申请号：US16548260
申请日：2019-08-22
IPC分类号： H01S5/32 , H01L31/0304 , H01S5/024 , H01L31/109 , H01L31/0328 , H01L31/0232 , H01S5/02 , H01S5/026 , H01S5/10
摘要： Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
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公开(公告)号：US20200333641A1
公开(公告)日：2020-10-22
申请号：US16919802
申请日：2020-07-02
摘要： Disclosed are structures as well as methods of manufacture and operation of integrated optoelectronic devices that facilitate directly heating the diode or waveguide structures to regulate a temperature of the device while allowing electrical contacts to be placed close to the device to reduce the electrical resistance. Embodiments include, in particular, heterogeneous electro-absorption modulators that include a compound-semiconductor diode structure placed above a waveguide formed in the device layer of an SOI substrate.
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公开(公告)号：US20200211923A1
公开(公告)日：2020-07-02
申请号：US16791315
申请日：2020-02-14
IPC分类号： H01L23/42 , H01L23/36 , H01L27/12 , H01L21/768 , H01L29/66 , H01L29/868
摘要： The thermal impedance of p-i-n diodes integrated on semiconductor-on-insulator substrates can be reduced with thermally conducting vias that shunt heat across thermal barriers such as, e.g., the thick top oxide cladding often encapsulating the p-i-n diode. In various embodiments, one or more thermally conducting vias extend from a top surface of the intrinsic diode layer to a metal structure connected to the doped top layer of the diode, and/or from that metal structure down to at least the semiconductor device layer of the substrate.
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公开(公告)号：US20200209655A1
公开(公告)日：2020-07-02
申请号：US16235197
申请日：2018-12-28
IPC分类号： G02F1/017
摘要： Disclosed are structures as well as methods of manufacture and operation of integrated optoelectronic devices that facilitate directly heating the diode or waveguide structures to regulate a temperature of the device while allowing electrical contacts to be placed close to the device to reduce the electrical resistance. Embodiments include, in particular, heterogeneous electro-absorption modulators that include a compound-semiconductor diode structure placed above a waveguide formed in the device layer of an SOI substrate.
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公开(公告)号：US20190273563A1
公开(公告)日：2019-09-05
申请号：US15910767
申请日：2018-03-02
摘要： Described are various configurations for an amplifying optical demultiplexer. Various embodiments can receive an input signal comprising multiple sub-signals, and separate and amplify the signals within the demultiplexer. Some embodiments include a multistage demultiplexer with amplifiers located between a first and second stage. Some embodiments include a multistage demultiplexer with amplifiers located between a second and third stage.
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公开(公告)号：US09960297B2
公开(公告)日：2018-05-01
申请号：US15361865
申请日：2016-11-28
发明人： Erik Johan Norberg , Anand Ramaswamy , Brian Koch
IPC分类号： H01L31/0336 , H01L31/0304 , H01S5/32 , H01L31/0328 , H01S5/024 , H01L31/0232 , H01S5/02 , H01S5/026 , H01S5/10
CPC分类号： H01L31/0304 , H01L31/02327 , H01L31/0328 , H01L31/109 , H01S5/021 , H01S5/02461 , H01S5/026 , H01S5/1032 , H01S5/3211 , H01S5/3213 , Y02E10/544
摘要： Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
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公开(公告)号：US20220065798A1
公开(公告)日：2022-03-03
申请号：US17006366
申请日：2020-08-28
摘要： Optical fabrication monitor structures can be included in a design fabricated on a wafer from a mask or fabrication reticle. A first set of components can be formed in an initial fabrication cycle, where the first set includes functional components and monitor structures. A second set of components can be formed by subsequent fabrication processes that can potentially cause errors or damage to the first set of components. The monitor structures can be implemented during fabrication (e.g., in a cleanroom) to detect fabrication errors without pulling or scrapping the wafer.
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