公开(公告)号：US20240186266A1

公开(公告)日：2024-06-06

申请号：US18165787

申请日：2023-02-07

Applicant: Juniper Networks, Inc.

Inventor： Valery KUGEL ,  Omar AHMED ,  Peng SU

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49816

Abstract: A semiconductor package includes a substrate, a semiconductor device, and a stiffener. The substrate has a top surface and a bottom surface. The semiconductor device is disposed on the top surface of the substrate. The stiffener is disposed on the bottom surface of the substrate. The stiffener may be disposed on a perimeter portion of the bottom surface of the substrate, and may not be disposed on a central portion of the bottom surface of the substrate. One or more connection components may disposed on the central portion of the bottom surface of the substrate, and a thickness of the stiffener may be greater than or equal to a thickness of the one or more connection components.

公开(公告)号：US20220312591A1

公开(公告)日：2022-09-29

申请号：US17214141

申请日：2021-03-26

Applicant: Juniper Networks, Inc.

Inventor： Peng SU ,  Omar AHMED ,  Bernard H. GLASAUER

IPC: H05K1/09 ,  H05K3/00 ,  H05K1/11

Abstract: A substrate structure may include a substrate that includes a set of conductive pads formed below a surface of the substrate. The substrate structure may include a set of conductive layer portions formed over the set of conductive pads, wherein a particular conductive layer portion, of the set of conductive layer portions, extends from a corresponding particular conductive pad, of the set of conductive pads, to at least the surface of the substrate.

公开(公告)号：US20240266301A1

公开(公告)日：2024-08-08

申请号：US18165790

申请日：2023-02-07

Applicant: Juniper Networks, Inc.

Inventor： Gautam GANGULY ,  Valery KUGEL ,  Omar AHMED ,  Leif HUTCHINSON ,  Peng SU ,  Matthew TWAROG ,  Attila I. ARANYOSI ,  David K. OWEN ,  Chang-Hong WU ,  Aliaskar HASSANZADEH ,  Boris REYNOV ,  Muhammad SAGARWALA

IPC: H01L23/00 ,  H01L23/498 ,  H05K1/18

CPC classification number: H01L23/562 ,  H01L23/49833 ,  H05K1/181 ,  H01L23/49811 ,  H01L23/49816 ,  H05K2201/09063 ,  H05K2201/10189 ,  H05K2201/10704 ,  H05K2201/10719 ,  H05K2201/10734

Abstract: An apparatus, includes a PCB, a semiconductor package that includes a substrate and a stiffener with an opening, and at least one connection component. The stiffener is disposed on a top surface of the PCB. The at least one connection component is configured to connect the PCB to the semiconductor package. The at least one connection component may include another PCB that is disposed on the substrate within the opening of the stiffener and on the PCB. The at least one connection component may include an array of connectors that are disposed on the substrate within the opening of the stiffener, and may include a socket disposed on the PCB. The at least one connection component may include a BGA that is disposed on the substrate within the opening of the stiffener and on the PCB and on a pedestal portion of a surface of the PCB.

公开(公告)号：US20240170417A1

公开(公告)日：2024-05-23

申请号：US18056499

申请日：2022-11-17

Applicant: Juniper Networks, Inc.

Inventor： Omar AHMED ,  Bernard H. GLASAUER ,  Peng SU

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49816

Abstract: In some implementations, an apparatus includes a substrate having a top surface and a bottom surface, a first array of connectors on the bottom surface of the substrate, a semiconductor device disposed on the top surface of the substrate, and a stiffener having a connection portion that extends along at least a portion of a side edge of the substrate. A bottom surface of the connection portion may be coplanar with the bottom surface of the substrate. The apparatus may include a second array of connectors on the bottom surface of the connection portion.