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公开(公告)号:US11342040B2
公开(公告)日:2022-05-24
申请号:US17184120
申请日:2021-02-24
Applicant: KIOXIA CORPORATION
Inventor: Ryo Yamaki , Youyang Ng , Koji Horisaki , Kazuhisa Horiuchi , Gibeom Park
Abstract: A memory system includes a non-volatile memory having a plurality of memory cells and a memory controller. The memory controller is configured to generate a histogram indicating, with respect to each of a plurality of threshold voltage levels for multi-level cell (MLC) reading, a number of memory cells at the threshold voltage level, based on data read from the plurality of memory cells using a plurality of reference read voltages, estimate a plurality of read voltages for MLC reading of the plurality of memory cells as estimation values by inputting the histogram into a read voltage estimation model, determine, through MLC reading of the plurality of memory cells using a plurality of sets of read voltages, a set of read voltages for MLC reading as observation values, and update one or more parameters of the read voltage estimation model based on the estimation values and the observation values.
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公开(公告)号:US20210089232A1
公开(公告)日:2021-03-25
申请号:US16790807
申请日:2020-02-14
Applicant: Kioxia Corporation
Inventor: Ryo Yamaki , Gibeom Park , Youyang Ng , Koji Horisaki , Kazuhisa Horiuchi
Abstract: According to one embodiment, in a memory system, a memory controller is configured to execute a first operation of observing an optimum value of a read voltage and updating a set value based on the observation result of the optimum value, at a predetermined time point of a plurality of time points for updating the set value of the read voltage for a plurality of memory cells, and execute a second operation of updating the set value based on the set value updated at one previous time point without executing the observation of the optimum value, at a time point after one time point of the predetermined time point.
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公开(公告)号:US11093173B2
公开(公告)日:2021-08-17
申请号:US16790807
申请日:2020-02-14
Applicant: Kioxia Corporation
Inventor: Ryo Yamaki , Gibeom Park , Youyang Ng , Koji Horisaki , Kazuhisa Horiuchi
Abstract: According to one embodiment, in a memory system, a memory controller is configured to execute a first operation of observing an optimum value of a read voltage and updating a set value based on the observation result of the optimum value, at a predetermined time point of a plurality of time points for updating the set value of the read voltage for a plurality of memory cells, and execute a second operation of updating the set value based on the set value updated at one previous time point without executing the observation of the optimum value, at a time point after one time point of the predetermined time point.
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公开(公告)号:US10957400B1
公开(公告)日:2021-03-23
申请号:US16802477
申请日:2020-02-26
Applicant: KIOXIA CORPORATION
Inventor: Koji Horisaki , Kazuhisa Horiuchi , Ryo Yamaki , Gibeom Park , Youyang Ng
Abstract: A memory controller performs a reference read on a plurality of memory cells using reference read voltages, generates a histogram indicating the number of memory cells in different threshold voltage bins based on results of the reference read, estimates actual read voltages based on the histogram and a first estimation function, and reads data using the actual read voltages. When reading of the data with the actual read voltages estimated using the first estimation function fails, the memory controller estimates actual read voltages using a second estimation function different from the first estimation function and reads the data with the actual read voltages estimated using the second estimation function.
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