Semiconductor image processing apparatus

    公开(公告)号:US11715189B2

    公开(公告)日:2023-08-01

    申请号:US16933441

    申请日:2020-07-20

    Abstract: A semiconductor image processing apparatus has an image input unit inputs a first semiconductor image, an exposure condition input unit configured to input exposure conditions, a generator performs a process of extracting a feature amount in consideration of the exposure conditions while reducing resolution of the first semiconductor image and thereafter use the extracted feature amount to increase the resolution to generate a second semiconductor image, and a discriminator configured to discriminate whether the input image is the second semiconductor image or a third semiconductor image provided in advance. The generator performs learning so that the discriminator erroneously discriminates the second semiconductor image as the third semiconductor image based on a result discriminated by the discriminator. The discriminator performs learning so as not to erroneously discriminate the second semiconductor image as the third semiconductor image, and not to erroneously discriminate the third semiconductor image as the second semiconductor image.

    Memory system
    2.
    发明授权

    公开(公告)号:US11093173B2

    公开(公告)日:2021-08-17

    申请号:US16790807

    申请日:2020-02-14

    Abstract: According to one embodiment, in a memory system, a memory controller is configured to execute a first operation of observing an optimum value of a read voltage and updating a set value based on the observation result of the optimum value, at a predetermined time point of a plurality of time points for updating the set value of the read voltage for a plurality of memory cells, and execute a second operation of updating the set value based on the set value updated at one previous time point without executing the observation of the optimum value, at a time point after one time point of the predetermined time point.

    Memory system
    3.
    发明授权

    公开(公告)号:US10957400B1

    公开(公告)日:2021-03-23

    申请号:US16802477

    申请日:2020-02-26

    Abstract: A memory controller performs a reference read on a plurality of memory cells using reference read voltages, generates a histogram indicating the number of memory cells in different threshold voltage bins based on results of the reference read, estimates actual read voltages based on the histogram and a first estimation function, and reads data using the actual read voltages. When reading of the data with the actual read voltages estimated using the first estimation function fails, the memory controller estimates actual read voltages using a second estimation function different from the first estimation function and reads the data with the actual read voltages estimated using the second estimation function.

    Information processing apparatus and information processing method

    公开(公告)号:US11715194B2

    公开(公告)日:2023-08-01

    申请号:US17191063

    申请日:2021-03-03

    Abstract: An information processing apparatus has an acquisitor configured to acquire an entire area image obtained by capturing an entire area of a processing surface of a wafer including at least one defect, a training image selector configured to select, as a training image, a partial image including at least one defect from the entire area image, a model constructor configured to construct a calculation model of generating a label image obtained by extracting and binarizing the defect included in the partial image, and a learner configured to update a parameter of the calculation model based on a difference between the label image generated by inputting the training image to the calculation model and a reference label image obtained by extracting and binarizing the defect of the training image.

    Memory system
    5.
    发明授权

    公开(公告)号:US11342040B2

    公开(公告)日:2022-05-24

    申请号:US17184120

    申请日:2021-02-24

    Abstract: A memory system includes a non-volatile memory having a plurality of memory cells and a memory controller. The memory controller is configured to generate a histogram indicating, with respect to each of a plurality of threshold voltage levels for multi-level cell (MLC) reading, a number of memory cells at the threshold voltage level, based on data read from the plurality of memory cells using a plurality of reference read voltages, estimate a plurality of read voltages for MLC reading of the plurality of memory cells as estimation values by inputting the histogram into a read voltage estimation model, determine, through MLC reading of the plurality of memory cells using a plurality of sets of read voltages, a set of read voltages for MLC reading as observation values, and update one or more parameters of the read voltage estimation model based on the estimation values and the observation values.

    MEMORY SYSTEM
    6.
    发明申请

    公开(公告)号:US20210089232A1

    公开(公告)日:2021-03-25

    申请号:US16790807

    申请日:2020-02-14

    Abstract: According to one embodiment, in a memory system, a memory controller is configured to execute a first operation of observing an optimum value of a read voltage and updating a set value based on the observation result of the optimum value, at a predetermined time point of a plurality of time points for updating the set value of the read voltage for a plurality of memory cells, and execute a second operation of updating the set value based on the set value updated at one previous time point without executing the observation of the optimum value, at a time point after one time point of the predetermined time point.

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