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公开(公告)号:US12133472B2
公开(公告)日:2024-10-29
申请号:US17463522
申请日:2021-08-31
Applicant: KIOXIA CORPORATION
Inventor: Katsuhiko Koui , Masaru Toko , Soichi Oikawa , Hideyuki Sugiyama
CPC classification number: H10N50/80 , H01F10/3259 , H01F10/3272 , H01F10/3286 , H10B61/00 , H10N50/10 , H10N50/85
Abstract: A magnetic storage device includes a magnetoresistance effect element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a non-magnetic layer between the first and second magnetic layers. The first magnetic layer includes a first layer that is magnetic, a second layer that is magnetic and farther from the non-magnetic layer than the first layer, and a third layer between the first and second layers. The third layer includes a first portion formed of an insulating material or a semiconductor material and a plurality of second portions surrounded by the first portion and formed of a conductive material.
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公开(公告)号:US12200945B2
公开(公告)日:2025-01-14
申请号:US17692625
申请日:2022-03-11
Applicant: Kioxia Corporation
Inventor: Kenji Fukuda , Hideyuki Sugiyama , Masahiko Nakayama , Hiroyuki Kanaya , Soichi Oikawa
Abstract: According to one embodiment, a memory device includes a first memory cell, a second memory cell adjacent to the first memory cell in a first direction, and a third memory cell adjacent to the first memory cell in a second direction, each of the first, second, and third memory cells including a resistance change memory element and a switching element. The switching element includes first and second electrodes, and a switching material layer between the first and second electrodes, the first and second electrodes overlap each other when viewed from the first direction, the first electrodes in the first and second memory cells are apart from each other, and the switching material layers in the first and second memory cells are continuously provided.
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公开(公告)号:US12236990B2
公开(公告)日:2025-02-25
申请号:US18184682
申请日:2023-03-16
Applicant: Kioxia Corporation
Inventor: Hideyuki Sugiyama , Kenji Fukuda , Yoshiaki Asao , Kazumasa Sunouchi
Abstract: According to one embodiment, a magnetic memory device includes a first wiring line, a plurality of second wiring lines, a plurality of first memory cells each including a first magnetoresistance effect element and a first selector connected in series, and a first switch. A respective one of the first memory cells is connected between the first wiring line and a respective one of the second wiring lines, a first voltage is applied to the second wiring line connected to a selected first memory cell, and a second voltage is applied to the second wiring line connected to a non-selected first memory cell, a first terminal of the first switch is connected to the first wiring line, and a third voltage is applied to a second terminal of the first switch.
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公开(公告)号:US11980104B2
公开(公告)日:2024-05-07
申请号:US17117813
申请日:2020-12-10
Applicant: Kioxia Corporation
Inventor: Masaru Toko , Hideyuki Sugiyama , Soichi Oikawa , Masahiko Nakayama
Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element including a first magnetic layer having a variable magnetization direction, a second magnetic layer having a variable magnetization direction, a third magnetic layer having a fixed magnetization direction and a nonmagnetic layer, the first magnetic layer being provided between the second and third magnetic layers, and the nonmagnetic layer being provided between the first and third magnetic layers. The second magnetic layer has a superlattice structure in which first element layers and second element layers are alternately stacked. The first element is Co, and the second element is selected from Pt, Ni and Pd, and the second magnetic layer contains Cr as a third element.
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公开(公告)号:US12178148B2
公开(公告)日:2024-12-24
申请号:US17899914
申请日:2022-08-31
Applicant: KIOXIA CORPORATION
Inventor: Kenji Fukuda , Rina Nomoto , Hiroyuki Kanaya , Masahiko Nakayama , Hideyuki Sugiyama
Abstract: A storage device includes a memory cell including a variable resistance element and a switching element having snapback current-voltage characteristics. The switching element includes a first conductive layer in contact with the variable resistance element, a second conductive layer, and a switching layer provided between the first conductive layer and the second conductive layer. The switching layer includes at least one switching member and a first insulating layer having a thermal conductivity higher than 1.4 W/m/K. A cross-sectional area of the switching member at a connection surface between the switching layer and the first conductive layer and a cross-sectional area of the switching member at a connection surface between the switching layer and the second conductive layer are each smaller than a cross-sectional area at a connection surface between the first conductive layer and the variable resistance element.
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