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公开(公告)号:US20240061620A1
公开(公告)日:2024-02-22
申请号:US18501943
申请日:2023-11-03
Applicant: Kioxia Corporation
Inventor: Takeshi NAKANO , Akihiko ISHIHARA , Shingo TANIMOTO , Yasuaki NAKAZATO , Shinji MAEDA , Minoru UCHIDA , Kenji SAKAUE , Koichi INOUE , Yosuke KINO , Takumi SASAKI , Mikio TAKASUGI , Kouji SAITOU , Hironori NAGAI , Shinya TAKEDA , Akihito TOUHATA , Masaru OGAWA , Akira AOKI
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F11/1068
Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.
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公开(公告)号:US20240094923A1
公开(公告)日:2024-03-21
申请号:US18162275
申请日:2023-01-31
Applicant: Kioxia Corporation
Inventor: Takashi WAKUTSU , Yasuaki NAKAZATO , Takeshi NAKANO
IPC: G06F3/06
CPC classification number: G06F3/0619 , G06F3/064 , G06F3/0679
Abstract: A controller assigns a first plurality of blocks among a plurality of blocks provided in a non-volatile memory to a first area, assigns a second plurality of blocks to a second area, and assigns a third plurality of blocks to a third area. The controller uses each block assigned to the first area in a first mode, uses each block assigned to the second area in a second mode in which the number of bits of data written in each memory cell is larger than that in the first mode, and uses each block assigned to the third area in the first mode or the second mode. The controller writes data received from a host device to an area that corresponds to a designation from the host device out of the first area and the third area. The controller transcribes valid data written to the first area and the third area to the second area.
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公开(公告)号:US20210303214A1
公开(公告)日:2021-09-30
申请号:US17185104
申请日:2021-02-25
Applicant: KIOXIA CORPORATION
Inventor: Takeshi NAKANO , Akihiko ISHIHARA , Shingo TANIMOTO , Yasuaki NAKAZATO , Shinji MAEDA , Minoru UCHIDA , Kenji SAKAUE , Koichi INOUE , Yosuke KINO , Takumi SASAKI , Mikio TAKASUGI , Kouji SAITOU , Hironori NAGAI , Shinya TAKEDA , Akihito TOUHATA , Masaru OGAWA , Akira AOKI
Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.
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