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公开(公告)号:US20210303214A1
公开(公告)日:2021-09-30
申请号:US17185104
申请日:2021-02-25
Applicant: KIOXIA CORPORATION
Inventor: Takeshi NAKANO , Akihiko ISHIHARA , Shingo TANIMOTO , Yasuaki NAKAZATO , Shinji MAEDA , Minoru UCHIDA , Kenji SAKAUE , Koichi INOUE , Yosuke KINO , Takumi SASAKI , Mikio TAKASUGI , Kouji SAITOU , Hironori NAGAI , Shinya TAKEDA , Akihito TOUHATA , Masaru OGAWA , Akira AOKI
Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.
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公开(公告)号:US20240193080A1
公开(公告)日:2024-06-13
申请号:US18454265
申请日:2023-08-23
Applicant: Kioxia Corporation
Inventor: Noriyuki MORIYASU , Masaru OGAWA , Kenji SAKAUE
IPC: G06F12/02
CPC classification number: G06F12/0246 , G06F2212/7203
Abstract: A memory system including a plurality of nonvolatile memories and a controller. The controller is connected to the plurality of nonvolatile memories via a plurality of channels. The nonvolatile memory stores a first parameter indicating a delay value. The controller acquires the first parameter from the nonvolatile memory. The controller delays start timing of data transfer to the nonvolatile memory via a channel among the plurality of channels by a delay value according to the first parameter.
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公开(公告)号:US20240061620A1
公开(公告)日:2024-02-22
申请号:US18501943
申请日:2023-11-03
Applicant: Kioxia Corporation
Inventor: Takeshi NAKANO , Akihiko ISHIHARA , Shingo TANIMOTO , Yasuaki NAKAZATO , Shinji MAEDA , Minoru UCHIDA , Kenji SAKAUE , Koichi INOUE , Yosuke KINO , Takumi SASAKI , Mikio TAKASUGI , Kouji SAITOU , Hironori NAGAI , Shinya TAKEDA , Akihito TOUHATA , Masaru OGAWA , Akira AOKI
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F11/1068
Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.
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