公开(公告)号：US20220301630A1

公开(公告)日：2022-09-22

申请号：US17464297

申请日：2021-09-01

Applicant: Kioxia Corporation

Inventor： Takeshi NAKANO ,  Yuzuru SHIBAZAKI ,  Hideyuki KATAOKA ,  Junichi SATO ,  Hiroki DATE

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/30 ,  G11C16/24 ,  G11C16/08 ,  G11C16/04 ,  G11C29/42

Abstract: A semiconductor storage device in an embodiment includes a plurality of planes each including a memory cell array, a voltage generation circuit configured to apply a first intermediate voltage to an adjacent word line adjacent to a selected word line in a former half of a program period and apply a second intermediate voltage higher than the first intermediate voltage to the adjacent word line in a latter half of the program period, a discharge circuit configured to feed a discharge current from the selected word line in a period corresponding to a period in which the second intermediate voltage is applied to the adjacent word line, and a control circuit configured to set a discharge characteristic of the discharge circuit according to a number of the planes.

公开(公告)号：US20240061620A1

公开(公告)日：2024-02-22

申请号：US18501943

申请日：2023-11-03

Applicant: Kioxia Corporation

Inventor： Takeshi NAKANO ,  Akihiko ISHIHARA ,  Shingo TANIMOTO ,  Yasuaki NAKAZATO ,  Shinji MAEDA ,  Minoru UCHIDA ,  Kenji SAKAUE ,  Koichi INOUE ,  Yosuke KINO ,  Takumi SASAKI ,  Mikio TAKASUGI ,  Kouji SAITOU ,  Hironori NAGAI ,  Shinya TAKEDA ,  Akihito TOUHATA ,  Masaru OGAWA ,  Akira AOKI

IPC: G06F3/06 ,  G06F11/10

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679 ,  G06F11/1068

Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.

公开(公告)号：US20240094923A1

公开(公告)日：2024-03-21

申请号：US18162275

申请日：2023-01-31

Applicant: Kioxia Corporation

Inventor： Takashi WAKUTSU ,  Yasuaki NAKAZATO ,  Takeshi NAKANO

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0679

Abstract: A controller assigns a first plurality of blocks among a plurality of blocks provided in a non-volatile memory to a first area, assigns a second plurality of blocks to a second area, and assigns a third plurality of blocks to a third area. The controller uses each block assigned to the first area in a first mode, uses each block assigned to the second area in a second mode in which the number of bits of data written in each memory cell is larger than that in the first mode, and uses each block assigned to the third area in the first mode or the second mode. The controller writes data received from a host device to an area that corresponds to a designation from the host device out of the first area and the third area. The controller transcribes valid data written to the first area and the third area to the second area.

公开(公告)号：US20220375517A1

公开(公告)日：2022-11-24

申请号：US17882128

申请日：2022-08-05

Applicant: Kioxia Corporation

Inventor： Hiroki DATE ,  Takeshi NAKANO

IPC: G11C11/56 ,  G11C16/26 ,  G11C16/04

Abstract: A semiconductor storage device includes: a first memory cell and a second memory cell that are adjacent to each other and connected to each other in series; a first word line connected to the first memory cell; a second word line connected to the second memory cell; and a control circuit. The control circuit is configured to, in a first read operation to read a first bit stored in the first memory cell, apply a first voltage to the first word line, and then, apply a first read voltage lower than the first voltage, to the first word line, and apply a second voltage to the second word line, and then, apply a third voltage lower than the second voltage and higher than the first voltage, to the second word line. The third voltage is applied to the second word line after the first read voltage is applied to the first word line.

公开(公告)号：US20210303214A1

公开(公告)日：2021-09-30

申请号：US17185104

申请日：2021-02-25

Applicant: KIOXIA CORPORATION

Inventor： Takeshi NAKANO ,  Akihiko ISHIHARA ,  Shingo TANIMOTO ,  Yasuaki NAKAZATO ,  Shinji MAEDA ,  Minoru UCHIDA ,  Kenji SAKAUE ,  Koichi INOUE ,  Yosuke KINO ,  Takumi SASAKI ,  Mikio TAKASUGI ,  Kouji SAITOU ,  Hironori NAGAI ,  Shinya TAKEDA ,  Akihito TOUHATA ,  Masaru OGAWA ,  Akira AOKI

IPC: G06F3/06 ,  G06F11/10

Abstract: A memory system includes a non-volatile memory and a controller that includes a first memory and is configured to write log data to the first memory, including a history of commands for controlling the memory system. An information processing system includes the memory system and an information processing device configured to store an expected value and to transmit a signal that instructs the memory system to stop when a value of the log data transmitted from the memory system does not match the expected value. The expected value and the transmitted value are determined based on the log data of the memory system.

公开(公告)号：US20220020428A1

公开(公告)日：2022-01-20

申请号：US17183933

申请日：2021-02-24

Applicant: Kioxia Corporation

Inventor： Hiroki DATE ,  Takeshi NAKANO

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/26

Abstract: A semiconductor storage device includes: a first memory cell and a second memory cell that are adjacent to each other and connected to each other in series; a first word line connected to the first memory cell; a second word line connected to the second memory cell; and a control circuit. The control circuit is configured to, in a first read operation to read a first bit stored in the first memory cell, apply a first voltage to the first word line, and then, apply a first read voltage lower than the first voltage, to the first word line, and apply a second voltage to the second word line, and then, apply a third voltage lower than the second voltage and higher than the first voltage, to the second word line. The third voltage is applied to the second word line after the first read voltage is applied to the first word line.