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33 条记录 (耗时 0.025 秒)

    Capacitor calibration in SAR converter
    1.
    发明授权
    Capacitor calibration in SAR converter 有权
    SAR转换器中的电容校准

    公开(公告)号：US06891487B2

    公开(公告)日：2005-05-10

    申请号：US10752913

    申请日：2004-01-07

    申请人： Ka Y. Leung ,  Douglas R. Holberg ,  Kafai Leung

    发明人： Ka Y. Leung ,  Douglas R. Holberg ,  Kafai Leung

    IPC分类号： G06F13/28 ,  H01C10/16 ,  H03M1/06 ,  H03M1/10 ,  H03M1/12 ,  H03M1/34 ,  H03M1/38 ,  H03M1/46 ,  H03M1/66 ,  H03M1/78

    CPC分类号： H03M1/1057 ,  H03M1/468

    摘要： Capacitor calibration in SAR converter. A method for calibrating a switched capacitor array in a SAR data converter is disclosed, which array includes a plurality of primary capacitors having a common node plate interfaced to a common node and a switched plate interfaced to a switch that is operable to be switched between first and second reference voltages. A comparator having an input connected to the common node and a reference input connected to a comparator reference node receives a comparator reference voltage. In a first calibration step for calibrating one of the primary capacitors, a reference capacitor is provided and then, the switched plate of the select primary capacitor is connected to the first reference voltage, the switched plate of the other capacitors and the reference capacitor are connected to the second reference voltage, and the common node and the comparator reference node are driven with a driver to dispose a first voltage thereon. In a second calibration step, the common node is allowed to float, the switched plate of the select primary capacitor is connected to the second reference voltage, the switched plate of the reference capacitor is connected to the first reference voltage, and the voltage on the common node is compared to the first voltage on the comparator reference node. A determination is then made as to whether the voltage on the common node is greater than the first voltage. A plurality of trim capacitors are provided and, if in the second calibration step, the voltage on the common node was determined to be greater than the first voltage, then one of the trim capacitors is disposed in parallel with the select one of the primary capacitors and then the first and second calibrating steps are repeated.

    摘要翻译： SAR转换器中的电容校准。 公开了一种用于校准SAR数据转换器中的开关电容器阵列的方法，该阵列包括具有与公共节点接口的公共节点板的多个初级电容器和与开关接口的开关板，该开关板可操作以在第一 和第二参考电压。 具有连接到公共节点的输入和连接到比较器参考节点的参考输入的比较器接收比较器参考电压。 在用于校准主电容器之一的第一校准步骤中，提供参考电容器，然后，选择一次电容器的开关板连接到第一参考电压，另一电容器的开关板和参考电容器连接 到第二参考电压，并且公共节点和比较器参考节点由驱动器驱动以在其上设置第一电压。 在第二校准步骤中，允许公共节点浮动，选择主电容器的开关板连接到第二参考电压，参考电容器的开关板连接到第一参考电压，并且在 公共节点与比较器参考节点上的第一个电压进行比较。 然后确定公共节点上的电压是否大于第一电压。 提供多个修整电容器，如果在第二校准步骤中，将公共节点上的电压确定为大于第一电压，则将一个修整电容器与主电容器中的选择一个平行设置 然后重复第一和第二校准步骤。

    High voltage difference amplifier with spark gap ESD protection
    2.
    发明授权
    High voltage difference amplifier with spark gap ESD protection 有权
    高电压差放大器具有火花隙ESD保护

    公开(公告)号：US06879004B2

    公开(公告)日：2005-04-12

    申请号：US10288188

    申请日：2002-11-05

    申请人： Ka Y. Leung ,  Douglas R. Holberg

    发明人： Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： H01L23/62

    CPC分类号： H01L23/62 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A spark gap device for protecting an integrated circuit. The spark gap device includes a first node for receiving an input signal and a second node to be protected. A first conductive layer is conductively interfaced to the first node and the second node and disposed therebetween. A second conductive layer is connected to a sink voltage and separated from the first conductive layer by an insulating layer of a predetermined thickness. A portion of the first conductive layer is disposed proximate to the second conductive layer and not overlying the second conductive layer, such that a gap is formed therebetween and the gap having a dimension that is greater than the thickness of the insulating layer.

    摘要翻译： 一种用于保护集成电路的火花隙装置。 火花隙装置包括用于接收输入信号的第一节点和待保护的第二节点。 第一导电层导电地接合到第一节点和第二节点并且设置在它们之间。 第二导电层连接到宿电压，并通过预定厚度的绝缘层与第一导电层分离。 第一导电层的一部分设置成靠近第二导电层并且不覆盖第二导电层，使得在其间形成间隙，并且间隙的尺寸大于绝缘层的厚度。

    Segmented D/A converter with enhanced dynamic range
    3.
    发明授权
    Segmented D/A converter with enhanced dynamic range 失效
    具有增强动态范围的分段D / A转换器

    公开(公告)号：US06724336B2

    公开(公告)日：2004-04-20

    申请号：US10141462

    申请日：2002-05-07

    申请人： Ka Y. Leung ,  Douglas R. Holberg

    发明人： Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： H03M166

    CPC分类号： H03M1/0602 ,  H03M1/682 ,  H03M1/765

    摘要： A digital-to-analog converter having series-connected transistors forming high impedance current sources for respective segmented resistor strings. A series transistor forming a current sink for one resistor string presents a high output impedance by utilizing a negative feedback amplifier. The effects of a headroom resistor and an offset resistor in one resistor string are negated by configuring an output amplifier with appropriate gain resistors. A highly accurate D/A conversion can be achieved by utilizing all resistors of the main and sub-resistor strings with the same value.

    摘要翻译： 具有串联连接的晶体管的数模转换器形成用于各个分段电阻串的高阻抗电流源。 形成用于一个电阻器串的电流吸收器的串联晶体管通过利用负反馈放大器呈现高输出阻抗。 通过使用适当的增益电阻配置输出放大器，可以消除一个电阻串中的裕量电阻和偏移电阻的影响。 通过使用相同值的主电阻和子电阻串的所有电阻，可以实现高精度的D / A转换。

    Digital pulse width modulated power supply with variable LSB
    5.
    发明授权
    Digital pulse width modulated power supply with variable LSB 失效
    数字脉宽调制电源，可变LSB

    公开(公告)号：US07323855B2

    公开(公告)日：2008-01-29

    申请号：US11095844

    申请日：2005-03-31

    申请人： Jinwen Xiao ,  Ka Y. Leung ,  Douglas R. Holberg

    发明人： Jinwen Xiao ,  Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： G05F1/46 ,  G05F1/62

    CPC分类号： H02M3/33515 ,  H02M3/33576 ,  H02M2001/0012

    摘要： A DC-DC digital pulse width modulated power supply is disclosed for generating a DC regulated output voltage. A digital control node has a digital control voltage disposed thereon for controlling the operation of the supply, wherein the digital control voltage has a substantially zero voltage when the output voltage of the supply is at a desired regulation, the digital control voltage having a resolution defined by a least significant bit (LSB). An input node receives a DC analog reference voltage defining the output voltage of the supply. A difference device determines the difference between the analog reference voltage and the output voltage to generate said digital control voltage. An LSB variation device varies the size of the LSB without varying the value of the digital control voltage for a substantially zero difference between the analog reference voltage and the output voltage.

    摘要翻译： 公开了用于产生直流调节输出电压的DC-DC数字脉宽调制电源。 数字控制节点具有设置在其上用于控制电源的操作的数字控制电压，其中当电源的输出电压处于期望的调节时，数字控制电压具有基本为零的电压，数字控制电压具有定义的分辨率 通过最低有效位（LSB）。 输入节点接收限定电源的输出电压的DC模拟参考电压。 差分装置确定模拟参考电压和输出电压之间的差异，以产生所述数字控制电压。 LSB变化装置改变LSB的大小，而不改变模拟参考电压和输出电压之间的基本上零差的数字控制电压的值。

    D/A converter street effect compensation
    6.
    发明授权
    D/A converter street effect compensation 有权
    D / A转换器街道效应补偿

    公开(公告)号：US06400300B1

    公开(公告)日：2002-06-04

    申请号：US09584311

    申请日：2000-05-31

    申请人： Ka Y. Leung ,  Douglas R. Holberg

    发明人： Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： H03M178

    CPC分类号： H03M1/0678 ,  H03M1/682 ,  H03M1/765 ,  H04J14/0226 ,  H04L12/2856 ,  H04Q11/0067 ,  H04Q11/0071

    摘要： A digital-to-analog converter (DAC) employs a main DAC resistor string and a sub-resistor string formed in a semiconductor material. A main DAC conversion circuit is formed with a headroom resistor in series with the main DAC resistor string. The headroom resistor provides an operating voltage for current drivers in the sub-resistor string. The headroom resistor is formed adjacent to the main DAC resistor string in the semiconductor material to provide street effect compensation thereto. In practice, the main DAC resistor string is formed as two sets of resistor strings. The headroom resistor is formed as a first resistor string adjacent one main DAC resistor string set, and as a second resistor string adjacent the other main DAC resistor string set. The plural resistors of the headroom resistor strings have resistor values equal to the plural resistors of the respective main DAC resistor string sets.

    摘要翻译： 数模转换器（DAC）采用主DAC电阻串和形成在半导体材料中的子电阻串。 主DAC转换电路形成有与主DAC电阻串串联的裕量电阻器。 裕量电阻为子电阻串中的电流驱动器提供工作电压。 余量电阻器形成在半导体材料中与主DAC电阻串相邻以提供街道效应补偿。 实际上，主DAC电阻串形成两组电阻串。 余量电阻器形成为与一个主DAC电阻串组相邻的第一电阻器串，并且形成为与另一个主DAC电阻串组相邻的第二电阻器串。 裕量电阻串的多个电阻器具有等于相应的主DAC电阻串组的多个电阻器的电阻值。

    Flash ADC with variable LSB
    9.
    发明授权
    Flash ADC with variable LSB 失效
    具有可变LSB的闪存ADC

    公开(公告)号：US07061421B1

    公开(公告)日：2006-06-13

    申请号：US11096163

    申请日：2005-03-31

    申请人： Jinwen Xiao ,  Ka Y. Leung ,  Douglas R. Holberg

    发明人： Jinwen Xiao ,  Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： H03M1/78

    CPC分类号： H03M1/363 ,  H02M3/33592 ,  Y02B70/1475

    摘要： A differential analog-to-digital data converter (ADC) is disclosed for receiving a positive input signal and a negative input signal. A distributed resistive device is provided having taps associated therewith. A plurality of comparators each having a signal input and a reference input are provided, the signal input connected to one of the positive and negative input signals and the reference input connected to a tap on said distributed resistive device. A driver drives current through the distributed resistive device with one of the taps of the distributed resistive device disposed at substantially the other of the positive and negative input signals. A current varying device varys the current through the distributed resistive device to vary the voltage between taps.

    摘要翻译： 公开了用于接收正输入信号和负输入信号的差分模数转换器（ADC）。 提供具有与其相关联的抽头的分布式电阻装置。 提供了各自具有信号输入和参考输入的多个比较器，所述信号输入连接到正输入信号和负输入信号中的一个以及连接到所述分布式电阻装置上的抽头的基准输入。 驱动器驱动电流通过分布式电阻器件，分布式电阻器件的抽头中的一个位于基本上正负输入信号的另一个处。 电流变化的装置通过分布式电阻装置改变电流以改变抽头之间的电压。

    Segemented D/A converter with enhanced dynamic range
    10.
    发明授权
    Segemented D/A converter with enhanced dynamic range 有权
    具有增强动态范围的分段D / A转换器

    公开(公告)号：US06384763B1

    公开(公告)日：2002-05-07

    申请号：US09583341

    申请日：2000-05-31

    申请人： Ka Y. Leung ,  Douglas R. Holberg

    发明人： Ka Y. Leung ,  Douglas R. Holberg

    IPC分类号： H03M178

    CPC分类号： H03M1/0602 ,  H03M1/682 ,  H03M1/765

    摘要： A digital-to-analog converter having series-connected transistors forming high impedance current sources for respective segmented resistor strings. A series transistor forming a current sink for one resistor string presents a high output impedance by utilizing a negative feedback amplifier. The effects of a headroom resistor and an offset resistor in one resistor string are negated by configuring an output amplifier with appropriate gain resistors. A highly accurate D/A conversion can be achieved by utilizing all resistors of the main and sub-resistor strings with the same value.

    摘要翻译： 具有串联连接的晶体管的数模转换器形成用于各个分段电阻串的高阻抗电流源。 形成用于一个电阻器串的电流吸收器的串联晶体管通过利用负反馈放大器呈现高输出阻抗。 通过使用适当的增益电阻配置输出放大器，可以消除一个电阻串中的裕量电阻和偏移电阻的影响。 通过使用相同值的主电阻和子电阻串的所有电阻，可以实现高精度的D / A转换。