摘要:
A method of scheduling high-priority packets in a metro Ethernet switch is described. In one embodiment, the method comprises the steps of determining a maximum queuing delay allowed for at least two high-priority packets in an output queue in the switch; determining which one of the at least two high-priority packets has the smallest maximum queuing delay allowed; and scheduling the one of the at least two high-priority packets determined to have the smallest maximum queuing delay allowed before the remaining ones of the at least two high-priority packets.
摘要:
A method of scheduling high-priority packets in a metro Ethernet switch is described. In one embodiment, the method comprises the steps of determining a maximum queuing delay allowed for at least two high-priority packets in an output queue in the switch; determining which one of the at least two high-priority packets has the smallest maximum queuing delay allowed; and scheduling the one of the at least two high-priority packets determined to have the smallest maximum queuing delay allowed before the remaining ones of the at least two high-priority packets.
摘要:
Disclosed are a remote controller, a remote controlling method, and a display system having the same. An image displayed on a display apparatus may be converted by using one remote controller. The display system may perform a converting the image by using one remote controller, without implementing a touch screen on the display apparatus or using two or more remote controllers for multi-touch. This may enhance a user's convenience and reduce fabrication costs.
摘要:
Packets received at a network element are filtered according to a plurality of filtering rules, where each filtering rule includes filtering data associated with one or more fields of a received packet. Rule groups are defined to include a plurality of filtering rules having common associated fields. For each rule group, global filter masks are generated, where bit positions in the global filter mask indicate whether each filtering rule in the rule group has a predetermined value at a corresponding bit position. As packets are received, comparing the global filter masks to one or more fields in the packets to determine whether there is a possibility that one of the rules in a corresponding rule group will match data in the fields.
摘要:
An integrated circuit package system is provided providing an integrated circuit die, and enclosing the integrated circuit die in a heat dissipation enclosure comprises mounting the integrated circuit die on a die paddle attaching a heat block ring to the die paddle around the integrated circuit die, and attaching a heat slug on the heat block ring over the integrated circuit die.
摘要:
Disclosed are various exemplary embodiments of a clock recovery apparatus for recovering clock signals of multiple data channels. In one exemplary embodiment a clock recovery apparatus for a plurality of data channels may include a plurality of channel blocks, where each channel block may include a frequency detection block configured to generate an intermediate signal based on a respective data signal received from a respective data channel and a global signal, and a recovery block configured to recover a clock signal for the respective data channel in response to the respective data signal and the global signal. The apparatus may also include a global signal generation block configured to receive and combine the intermediate signals from the plurality of channel blocks to generate the global signal.
摘要:
A display apparatus including a display panel and a patterned retarder disposed on the display panel. The display apparatus displays a first image in a 2D mode and displays a second image including a left-eye image and a right-eye image in a 3D mode. Each of the sub-pixels included in the display panel includes two or three sub-pixel electrodes, and the patterned retarder includes a first retarder and a second retarder, which provide different directivities from each other to the left-eye image and the right-eye image, respectively. The first retarder is disposed corresponding to at least a portion of the sub-pixels and the second retarder is disposed corresponding to a remaining portion of the sub-pixels.
摘要:
An organ type accelerator pedal includes a footplate, a housing, and a pedal arm. One end of the footplate is fixed to a floor panel, which is provided below a driver's seat. The housing is spaced apart from the footplate and fixed to a dashboard. A middle portion of the pedal arm between both ends thereof is attached to the housing by a first connector so as to elastically rotate, and one end of the pedal arm facing the footplate is attached to the other end of the footplate by a second connector so as to elastically rotate. Accordingly, it is possible to improve the durability and life span of the accelerator pedal, to significantly improve operation feeling and safety of the accelerator pedal, and to prevent operation noise from being generated.
摘要:
Among the various aspects of the present disclosure is the provision of methods and systems for real-time 3D MRI that combines dynamic keyhole data sharing with super-resolution imaging methods to improve real-time 3D MR images in the presence of motion.