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公开(公告)号：US20100181601A1
公开(公告)日：2010-07-22
申请号：US12356252
申请日：2009-01-20
CPC分类号： H01S5/0261 , H01L27/0617 , H01S5/021 , H01S5/02248 , H01S5/0262 , H01S5/183 , H01S5/2214 , H01S2301/173
摘要： A semiconductor structure, comprising: a substrate; a seed layer over an upper surface of the substrate; a semiconductor layer disposed over the seed layer; a transistor device in the semiconductor layer; wherein the substrate has an aperture therein, such aperture extending from a bottom surface of the substrate and terminating on a bottom surface of the seed layer; and an opto-electric structure disposed on the bottom surface of the seed layer.
摘要翻译： 一种半导体结构，包括：基板; 在所述基板的上表面上的种子层; 设置在种子层上的半导体层; 半导体层中的晶体管器件; 其中所述基底在其中具有孔，所述孔从所述基底的底表面延伸并终止在所述籽晶层的底表面上; 以及设置在种子层的底表面上的光电结构。
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公开(公告)号：US08853745B2
公开(公告)日：2014-10-07
申请号：US12356252
申请日：2009-01-20
CPC分类号： H01S5/0261 , H01L27/0617 , H01S5/021 , H01S5/02248 , H01S5/0262 , H01S5/183 , H01S5/2214 , H01S2301/173
摘要： A semiconductor structure, comprising: a substrate; a seed layer over an upper surface of the substrate; a semiconductor layer disposed over the seed layer; a transistor device in the semiconductor layer; wherein the substrate has an aperture therein, such aperture extending from a bottom surface of the substrate and terminating on a bottom surface of the seed layer; and an opto-electric structure disposed on the bottom surface of the seed layer.
摘要翻译： 一种半导体结构，包括：基板; 在所述基板的上表面上的种子层; 设置在种子层上的半导体层; 半导体层中的晶体管器件; 其中所述基底在其中具有孔，所述孔从所述基底的底表面延伸并终止在所述籽晶层的底表面上; 以及设置在种子层的底表面上的光电结构。
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公开(公告)号：US09293379B2
公开(公告)日：2016-03-22
申请号：US12553249
申请日：2009-09-03
IPC分类号： H01L29/66 , H01L21/8252 , H01L21/311 , H01L27/06
CPC分类号： H01L21/8252 , H01L21/31111 , H01L27/0605
摘要： A method for forming a structure on a surface of a semiconductor. The method includes: forming the material as a lower layer of the structure using a first deposition process to provide the lower layer with a first etch rate to a predetermined etchant; forming the upper layer of the structure with the material on the lower using a second deposition process to provide the upper layer with a second etch rate to the predetermined etchant higher than the first etch rate; and applying the predetermined etchant to upper layer to selectively remove the upper while leaving the lower layer.
摘要翻译： 一种在半导体表面上形成结构的方法。 该方法包括：使用第一沉积工艺将所述材料形成为所述结构的下层，以向所述下层提供预定蚀刻剂的第一蚀刻速率; 使用第二沉积工艺在所述下部材料上形成所述结构的上层，以向所述上层提供比所述第一蚀刻速率高的所述预定蚀刻剂的第二蚀刻速率; 并将预定的蚀刻剂施加到上层，以选择性地移除上部，同时离开下层。
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公开(公告)号：US20110049581A1
公开(公告)日：2011-03-03
申请号：US12553249
申请日：2009-09-03
IPC分类号： H01L27/06 , H01L21/302 , H01L21/02 , H01L29/38 , H01L21/31
CPC分类号： H01L21/8252 , H01L21/31111 , H01L27/0605
摘要： A method for forming a structure on a surface of a semiconductor. The method includes: forming the material as a lower layer of the structure using a first deposition process to provide the lower layer with a first etch rate to a predetermined etchant; forming the upper layer of the structure with the material on the lower using a second deposition process to provide the upper layer with a second etch rate to the predetermined etchant higher than the first etch rate; and applying the predetermined etchant to upper layer to selectively remove the upper while leaving the lower layer.
摘要翻译： 一种在半导体表面上形成结构的方法。 该方法包括：使用第一沉积工艺将所述材料形成为所述结构的下层，以向所述下层提供预定蚀刻剂的第一蚀刻速率; 使用第二沉积工艺在所述下部材料上形成所述结构的上层，以向所述上层提供比所述第一蚀刻速率高的所述预定蚀刻剂的第二蚀刻速率; 并将预定的蚀刻剂施加到上层，以选择性地移除上部，同时离开下层。
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