Abstract:
A method, system, and computer program product for machine learning approach for detecting and correcting lithographic hot-spots in an integrated circuit (IC) design are provided in the illustrative embodiments. A layout corresponding to the IC design is received at a machine learning model (ML model). At the ML model using a hardware component, a set of input objects is identified corresponding to a target shape in the layout. A retargeting value is predicted for the target shape using the set of input objects, such that applying the retargeting value to the target shape in the layout causes the target shape to be modified into a modified target shape, wherein printing the modified target shape instead of the target shape eliminates a lithographic hot-spot that would otherwise occur from printing the target shape in a printed circuit corresponding to the IC design.
Abstract:
A method, system, and computer usable program product for equation based retargeting of design layouts are provided in the illustrative embodiments. A set of desirable combination of values of a set of layout parameters of the design layout is determined. A desirable region that includes the set of the desirable combination of values is determined. An equation is computed to determine a retargeting value for a first combination of values of the set of layout parameters with respect to the desirable region. Instructions are generated to adjust a value in the first combination to generate a second combination of values of the set of layout parameters such that the second combination falls in the desirable region. A shape in the design layout is retargeted such that the retargeted shape uses the second combination of values of the set of layout parameters. The IC is manufactured using the retargeted shape.
Abstract:
A method, system, and computer program product for classifying and prioritizing a set of recommended rule (RR) violations in an integrated circuit (IC) design are provided in the illustrative embodiments. The set of RR violations is received. A layout corresponding to the IC design is received. A set of features is selected in the layout. A classification model corresponding to the set of features is selected. Using the set of features and the classification model, the first RR violation is classified into a classification from a set of classifications. The classification is prioritized in an order of priority such that the first RR violation in the classification is recommended for remedying in the order of priority.
Abstract:
A method, system, and computer program product for improving pin access in a design of an integrated circuit (IC) for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A cell is placed in the IC design, the cell including a pin shape configured to connect a pin of the cell to a semi-conductor component in the IC design, the cell including a coloring conflict due to the pin shape and an other shape in the cell each being colored using a first color for fabricating onto a wafer using MPL. A net is routed to the pin shape without resolving the coloring conflict, wherein the routing routes the net using a first segment of the pin shape. The pin shape is modified after routing to resolve the coloring conflict to result in a modified cell.
Abstract:
A method, system, and computer program product for classifying and prioritizing a set of recommended rule (RR) violations in an integrated circuit (IC) design are provided in the illustrative embodiments. The set of RR violations is received. A layout corresponding to the IC design is received. A set of features is selected in the layout. A classification model corresponding to the set of features is selected. Using the set of features and the classification model, the first RR violation is classified into a classification from a set of classifications. The classification is prioritized in an order of priority such that the first RR violation in the classification is recommended for remedying in the order of priority.
Abstract:
A method, system, and computer program product for machine learning approach for detecting and correcting lithographic hot-spots in an integrated circuit (IC) design are provided in the illustrative embodiments. A layout corresponding to the IC design is received at a machine learning model (ML model). At the ML model using a hardware component, a set of input objects is identified corresponding to a target shape in the layout. A retargeting value is predicted for the target shape using the set of input objects, such that applying the retargeting value to the target shape in the layout causes the target shape to be modified into a modified target shape, wherein printing the modified target shape instead of the target shape eliminates a lithographic hot-spot that would otherwise occur from printing the target shape in a printed circuit corresponding to the IC design.
Abstract:
A method, system, and computer program product for multi-patterning lithography (MPL) aware cell placement in integrated circuit (IC) design are provided in the illustrative embodiments. A global phase of cell movement is performed. A local phase cell movement is performed, wherein the local phase includes moving a color instance of the cell from a plurality of color instances of the cell within a row of cell in the IC design, wherein the global phase and the local phase are each performed before a final placement is produced for the IC design.
Abstract:
A method, system, and computer usable program product for in an integrated circuit are provided in the illustrative embodiments. A signal to be measured is identified in the IC. The signal is provided as a first control voltage input to a first VCO in the IC. A first output frequency is generated from the first VCO, the first output frequency having a first frequency value corresponding to the signal. The signal is provided as a second control voltage input to a second VCO in the IC. A second output frequency is generated from the second VCO, the second output frequency having a second frequency value corresponding to the signal. The first and the second output frequency values are exported from the IC. A mean value and a standard deviation of the signal are computed using the output first and second frequency values.
Abstract:
A method, system, and computer program product for improving printability of a design of an integrated circuit (IC) using pitch-aware coloring for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A first shape is identified in a layout of the IC corresponding to the design as being apart by a first distance from a second shape. The first distance is a forbidden distance and at least equal to a minimum distance requirement of a lithography system. A determination is made that the first shape and the second shape are colored using a first color. The first shape is changed to a second color, such that even though the first distance is at least equal to the minimum distance requirement of the lithography system, the first and the second shapes are placed on different masks to print the design, thereby improving the printability of the design.
Abstract:
A method, system, and computer program product for improving printability of a design of an integrated circuit (IC) using pitch-aware coloring for multi-patterning lithography (MPL) are provided in the illustrative embodiments. A first shape is identified in a layout of the IC corresponding to the design as being apart by a first distance from a second shape. The first distance is a forbidden distance and at least equal to a minimum distance requirement of a lithography system. A determination is made that the first shape and the second shape are colored using a first color. The first shape is changed to a second color, such that even though the first distance is at least equal to the minimum distance requirement of the lithography system, the first and the second shapes are placed on different masks to print the design, thereby improving the printability of the design.